ICS9LRS3187B Datasheet, PDF (10/20 Pages) Integrated Device Technology – PROGRAMMABLE TIMING CONTROL HUB FOR INTEL BASED SYSTEMS

ICS9LRS3187B
Programmable Timing Control Hub for Intel Based Systems
Datasheet
Absolute Maximum Ratings - DC Parameters, Commercial Temperature Range
PARAMETER
SYMBOL
CONDITIONS
Maximum Supply Voltage
VDDxxx
Supply Voltage
Maximum Supply Voltage
VDDxxx_IO
Low-Voltage Differential I/O Supply
Maximum Input Voltage
V_IH
Minimum Input Voltage
V_IL
Storage Temperature
Ts
3.3V Inputs
Any Input
-
Input ESD protection
ESD prot
Human Body Model
Notes: (unless otherwise noted, guaranteed by design and characterization, not 100% tested in production).
1 _{Operation under these conditions is neither implied, nor guaranteed.}
2 _{Maximum VIH is not to exceed VDD}
3 _{Human Body Model}
MIN
TYP
GND - 0.5
-65
2000
MAX
4.6
3.8
4.6
150
UNITS Notes
V
1
V
1
V 1,2
V
1
°_C
1
V 1,3
Electrical Characteristics - Input/Supply/Common Output DC Parameters, Commercial Temperature Range
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX UNITS Notes
Ambient Operating Temp
Tambient
-
0
70
°C
Supply Voltage
VDDxxx
Supply Voltage
3.135
3.465
V
Supply Voltage
VDDxxx_IO
Low-Voltage Differential I/O Supply
0.9975
3.465
V
5
Input High Voltage
Input Low Voltage
Low Threshold Input- FSC = '1' Voltage
Low Threshold Input-Low Voltage
Input Leakage Current
Input Leakage Current
Output High Voltage
Output Low Voltage
Operating Supply Current
iAMT Mode Current
Powerdown Current
Input Frequency
Pin Inductance
Input Capacitance
Clk Stabilization
Tfall_SE
Trise_SE
SMBus Voltage
Low-level Output Voltage
Current sinking at V_OLSMB = 0.4 V
SCLK/SDATA
Clock/Data Rise Time
SCLK/SDATA
Clock/Data Fall Time
V_IHSE
Single-ended 3.3V inputs
2
V_DD + 0.3 V
3
V_ILSE
Single-ended 3.3V inputs
V_SS - 0.3
0.8
V
3
V_{IH_FSC}
3.3 V +/-5%
0.7
3.3
V
4
V_{IL_FSC}
3.3 V +/-5%
V_SS - 0.3
0.35
V
I_IN
V_IN = V_{DD ,} V_IN = GND
-5
5
uA
2
I_INRES
Inputs with pull up or pull down resistors
V_IN = V_{DD ,} V_IN = GND
-200
200
uA
V_OHSE
Single-ended outputs, I_OH = -1mA
2.4
V
1
V_OLSE
Single-ended outputs, I_OL = 1 mA
0.4
V
1
I_DDOP3.3
Full Active, C_L = Full load; Idd 3.3V
85
110
mA
I_DDOPIO
Full Active, C_L = Full load; IDD IO
18
25
mA 5
I_DDiAMT3.3
M1 mode, 3.3V Rail
48
60
mA
I_DDiAMTIO
M1 Mode, IO Rail
6
10
mA 5
I_DDPD3.3
Power down mode, 3.3V Rail
6
5
mA
I_DDPDIO
Power down mode, IO Rail
0
0.1
mA 5
F_i
V_DD = 3.3 V
14.3182
15
MHz
L_pin
7
nH
C_IN
Logic Inputs
1.5
5
pF
C_OUT
Output pin capacitance
6
pF
C_INX
X1 & X2 pins
6
pF
T_STAB
From VDD Power-Up or de-assertion of PD to 1st clock
1.0
1.8
ms
T_FALL
T_RISE
Fall/rise time of all 3.3V control inputs from 20-80%
10
ns
1
10
ns
1
V_DD
2.7
5.5
V
V_OLSMB
@ I_PULLUP
0.4
V
I_PULLUP
SMB Data Pin
4
5
mA
T_RI2C
(Max VIL - 0.15) to
(Min VIH + 0.15)
1000 ns
T_FI2C
(Min VIH + 0.15) to
(Max VIL - 0.15)
300
ns
Maximum SMBus Operating Frequency
F_SMBUS
Spread Spectrum Modulation Frequency
f_SSMOD
Triangular Modulation
Notes: (unless otherwise noted, guaranteed by design and characterization, not 100% tested in production).
1_{Signal is required to be monotonic in this region.}
2 _{Input leakage current does not include inputs with pull-up or pull-down resistors}
3 _{3.3V referenced inputs are: SCLK, SDATA, and CKPWRGD}
4 _{Frequency Select pins which have tri-level input}
5 _{If present, not all parts have this feature.}
100 kHz
30
32.54
33
kHz
IDT^® Programmable Timing Control Hub for Intel Based Systems
10
1602F—11/04/11