ICS843442I Datasheet, PDF (10/13 Pages) Integrated Device Technology – FemtoClock™ SAS/SATA Clock Generator

ICS843442I Data Sheet
3. Calculations and Equations.
The purpose of this section is to derive the power dissipated into the load.
LVPECL output driver circuit and termination are shown in Figure 4.
V_CC
FEMTOCLOCK™ SAS/SATA Clock Generator
Q1
V_OUT
RL
50Ω
V_CC - 2V
Figure 4. LVPECL Driver Circuit and Termination
To calculate worst case power dissipation into the load, use the following equations which assume a 50Ω load, and a termination voltage of
V_CC – 2V.
• For logic high, V_OUT = V_{OH_MAX} = V_{CC_MAX} – 0.9V
(V_{CC_MAX} – V_{OH_MAX}) = 0.9V
• For logic low, V_OUT = V_{OL_MAX} = V_{CC_MAX} – 1.7V
(V_{CC_MAX} – V_{OL_MAX}) = 1.7V
Pd_H is power dissipation when the output drives high.
Pd_L is the power dissipation when the output drives low.
Pd_H = [(V_{OH_MAX} – (V_{CC_MAX} – 2V))/R_L] * (V_{CC_MAX} – V_{OH_MAX}) = [(2V – (V_{CC_MAX} – V_{OH_MAX}))/R_L] * (V_{CC_MAX} – V_{OH_MAX}) =
[(2V – 0.9V)/50Ω] * 0.9V = 19.8mW
Pd_L = [(V_{OL_MAX} – (V_{CC_MAX} – 2V))/R_L] * (V_{CC_MAX} – V_{OL_MAX}) = [(2V – (V_{CC_MAX} – V_{OL_MAX}))/R_L] * (V_{CC_MAX} – V_{OL_MAX}) =
[(2V – 1.7V)/50Ω] * 1.7V = 10.2mW
Total Power Dissipation per output pair = Pd_H + Pd_L = 30mW
ICS843442AGI REVISION A JUNE 24, 2009
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©2009 Integrated Device Technology, Inc.