9DB233 Datasheet, PDF (10/14 Pages) Integrated Device Technology – Two Output Differential Buffer for PCIe Gen3

9DB233
Two Output Differential Buffer for PCIe Gen3
Datasheet
SMB us Table: Device C ontrol Register, READ/WRITE ADDRESS (D4/D5)
Byte 0
Pin #
Name
Control Function Type
0
1
Default
Bit 7
-
Bit 6
-
S W_ EN
Enables SMBus
PLL Functions _{PLL Functions}
Control of bite 1
RW
controlled by
S MBu s
controlled by
1
and 0
registers
device pins
RESERVED
RW
-
X
Bit 5
-
Bit 4
-
RESERVED
RW
-
X
RESERVED
RW
-
X
Bit 3
-
Bit 2
-
RESERVED
RW
-
X
RESERVED
RW
-
X
Bit 1
-
Selects PLL
PLL BW #adjust
Bandwidth
RW Low BW
High BW
1
Bit 0
-
PLL Enable
Bypasses PLL for
board test
RW
PLL bypassed
(fan out mode)
PLL enabled
(ZDB mode)
1
SMB us Table: Output Enable Register
Byte 1
Pin #
Name
Control Function Type
Bit 7
-
RESERVED
RW
Bit 6
-
RESERVED
RW
Bit 5
-
RESERVED
RW
Bit 4
-
RESERVED
RW
Bit 3
-
RESERVED
RW
Bit 2
-
RESERVED
RW
Bit 1
-
RESERVED
RW
Bit 0
-
RESERVED
RW
0
1
-
-
-
-
-
-
-
-
Default
X
X
X
X
X
X
X
X
SMB us Table: Function Select Register
Byte 2
Pin #
Name
Control Function Type
Bit 7
RESERVED
RW
Bit 6
RESERVED
RW
Bit 5
-
RESERVED
RW
Bit 4
-
RESERVED
RW
Bit 3
-
RESERVED
RW
Bit 2
-
RESERVED
RW
Bit 1
-
RESERVED
RW
Bit 0
-
RESERVED
RW
0
1
-
-
-
-
-
-
-
-
Default
X
X
X
X
X
X
X
X
SMB us Table: Vendor & Revision ID Register
Byte 3
Pin #
Name
Control Function Type
0
Bit 7
-
RID3
R
-
Bit 6
-
Bit 5
-
RID2
REVISION ID
R
-
RID1
R
-
Bit 4
-
RID0
R
-
Bit 3
-
VID 3
R
-
Bit 2
-
Bit 1
-
VID 2
VID 1
VENDOR ID
R
-
R
-
Bit 0
-
VID 0
R
-
1
Default
-
0
-
0
-
0
-
1
-
0
-
0
-
0
-
1
IDT^® Two Output Differential Buffer for PCIe Gen3
10
1667C—04/20/11