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ICS9LP525-2 Datasheet, PDF (1/21 Pages) Integrated Device Technology – 56-pin CK505 for Intel Desktop Systems
DATASHEET
56-pin CK505 for Intel Desktop Systems
ICS9LP525-2
Recommended Application:
CK505 clock, 56-pin Intel Yellow Cover part
Output Features:
• 2 - CPU differential low power push-pull pairs
• 7- SRC differential low power push-pull pairs
• 1 - CPU/SRC selectable differential low power push-pull pair
• 1 - SRC/DOT selectable differential low power push-pull pair
• 5 - PCI, 33MHz
• 1 - PCI_F, 33MHz free running
• 1 - USB, 48MHz
• 1 - REF, 14.318MHz
Key Specifications:
• CPU outputs cycle-cycle jitter < 85ps
• SRC output cycle-cycle jitter < 125ps
• PCI outputs cycle-cycle jitter < 250ps
• +/- 100ppm frequency accuracy on all outputs
• SRC are PCIe Gen2 compliant
Features/Benefits:
• Supports spread spectrum modulation, default is 0.5%
down spread
• Uses external 14.318MHz crystal, external crystal load
caps are required for frequency tuning
• Selectable SRC differential push-pull pair/two single
ended outputs
Table 1: CPU Frequency Select Table
FSLC2
B0b7
0
0
0
0
1
1
1
1
FSLB1
B0b6
0
0
1
1
0
0
1
1
FSLA1
B0b5
0
1
0
1
0
1
0
1
CPU
MHz
266.66
133.33
200.00
166.66
333.33
100.00
400.00
SRC PCI REF USB DOT
MHz MHz MHz MHz MHz
100.00 33.33 14.318 48.00 96.00
Reserved
1. FSLA and FSLB are low-threshold inputs.Please see VIL_FS and VIH_FS specifications in
the Input/Supply/Common Output Parameters Table for correct values.
Also refer to the Test Clarification Table.
2. FSLC is a three-level input. Please see the VIL_FS and VIH_FS
specifications in the Input/Supply/Common Output Parameters Table for correct values.
Pin Configuration
IDT® PC MAIN CLOCK
PCI0/CR#_A 1
56 SCLK
VDDPCI 2
55 SDATA
PCI1/CR#_B 3
PCI2/TME 4
PCI3/CFG0 5
PCI4/SRC5_EN 6
PCI_F5/ITP_EN 7
GNDPCI 8
VDD48 9
USB_48MHz/FSLA 10
GND48 11
VDD96_IO 12
DOTT_96/SRCT0 13
DOTC_96/SRCC0 14
GND 15
VDD 16
SRCT1/SE1 17
SRCC1/SE2 18
GND 19
VDDPLL3_IO 20
SRCT2/SATAT 21
SRCC2/SATAC 22
GNDSRC 23
SRCT3/CR#_C 24
SRCC3/CR#_D 25
VDDSRC_IO 26
SRCT4 27
SRCC4 28
54 REF0/FSLC/TEST_SEL
53 VDDREF
52 X1
51 X2
50 GNDREF
49 FSLB/TEST_MODE
48 CK_PWRGD/PD#
47 VDDCPU
46 CPUT0
45 CPUC0
44 GNDCPU
43 CPUT1_F
42 CPUC1_F
41 VDDCPU_IO
40 VOUT
39 CPUT2_ITP/SRCT8
38 CPUC2_ITP/SRCC8
37 VDDSRC_IO
36 SRCT7/CR#_F
35 SRCC7/CR#_E
34 GNDSRC
33 SRCT6
32 SRCC6
31 VDDSRC
30 PCI_STOP#/SRCT5
29 CPU_STOP#/SRCC5
56-SSOP & TSSOP
1
1397—11/08/10