ICS853S013I Datasheet, PDF (1/16 Pages) Integrated Device Technology – Output frequency

Low Skew, Dual, 1-to-3, Differential-to-2.5V,
3.3V LVPECL/ECL Fanout Buffer
ICS853S013I
DATASHEET
General Description
The ICS853S013I is a low skew, high performance dual 1-to-3
Differential-to-2.5V, 3.3V LVPECL/ ECL Fanout Buffer. The
ICS853S013I operates with a positive or negative power supply at
2.5V or 3.3V. Guaranteed output and part-to-part skew
characteristics make the ICS853S013I ideal for those clock
distribution applications demanding well defined performance and
repeatability.
Features
• Two differential LVPECL/ECL bank outputs
• Two differential LVPECL clock input pairs
• PCLKx, nPCLKx pairs can accept the following
differential input levels: LVPECL, LVDS, CML, SSTL
• Output frequency: 2GHz (maximum)
• Translates any single-ended input signal to LVPECL levels with
resistor bias on nPCLKx input
• Bank skew: 60ps (maximum)
• Part-to-part skew: 190ps (maximum)
• Propagation delay: 460ps (maximum)
• Additive phase jitter, RMS: 0.05ps (typical)
• LVPECL mode operating voltage supply range:
V_CC = 2.375V to 3.8V, V_EE = 0V
• ECL mode operating voltage supply range:
V_CC = 0V, V_EE = -3.8V to -2.375V
• -40°C to 85°C ambient operating temperature
• Available in lead-free (RoHS 6) package
Block Diagram
PCLKA ^Pulldown
nPCLKA ^{Pullup/Pulldown}
PCLKB ^Pulldown
nPCLKB ^{Pullup/Pulldown}
QA0
nQA0
QA1
nQA1
QA2
nQA2
QB0
nQB0
QB1
nQB1
QB2
nQB2
Pin Assignment
nQA0 1
QA0 2
VCC 3
PCLKA 4
nPCLKA 5
PCLKB 6
nPCLKB 7
VCC 8
nQB0 9
QB0 10
20 QA1
19 nQA1
18 QA2
17 nQA2
16 VCC
15 QB2
14 nQB2
13 QB1
12 nQB1
11 VEE
ICS853S013I
20-Lead SOIC
7.5mm x 12.8mm x 2.3mm package body
M Package
Top View
ICS853S013AMI REVISION A AUGUST 20, 2010
1
©2010 Integrated Device Technology, Inc.