843201-375 Datasheet, PDF (1/19 Pages) Integrated Device Technology – FemtoClock® Crystal-to-LVPECL 375MHz Frequency Margining Synthesizer

FemtoClock^® Crystal-to-LVPECL 375MHz
Frequency Margining Synthesizer
843201-375
DATASHEET
GENERAL DESCRIPTION
The 843201-375 is a low phase-noise frequency margining
synthesizer. In the default mode, the device nominally generates a
375MHz LVPECL output clock signal from a 25MHz crystal input.
There is also a frequency margining mode available where the
device can be configured, using control pins, to vary the output
frequency up or down from nominal by 5%. The 843201-375 is
provided in a 16-pin TSSOP package.
FEATURES
• One 375MHz nominal LVPECL output
• Crystal oscillator interface designed for 25MHz, 18pF parallel
resonant crystal
• Output frequency can be varied ± 5% from nominal
• VCO range: 700MHz - 800MHz
• RMS phase jitter @ 375MHz, using a 25MHz crystal
(12kHz - 20MHz): 0.72ps (typical) @ 3.3V
• Output supply modes
Core/Output
3.3V/3.3V
3.3V/2.5V
2.5V/2.5V
• 0°C to 70°C ambient operating temperature
• Available in lead-free (RoHS 6) package
• Functional replacement part 8T49N241-dddNLGI
BLOCK DIAGRAM
nPLL_SEL ^Pulldown
XTAL_IN ^25MHz
OSC
XTAL_OUT
0
Predivider
÷2
1
1
Phase
VCO
Detector
700 - 800MHz
0
÷2
÷30
(÷57, ÷63)
MODE
MARGIN
MR
Pulldown
Pulldown
Pulldown
PIN ASSIGNMENT
V_CC 1
16 Q
MODE 2 15 nQ
nc 3
14 V_CCO
XTAL_IN 4
13 V_CC
XTAL_OUT 5
12 V_EE
Q
MARGIN 6 11 MR
V_EE 7
10 nPLL_SEL
nQ
nc 8
9 nc
843201-375
16-Lead TSSOP
4.4mm x 5.0mm x 0.92mm
package body
G Package
Top View
843201-375 REVISION A 8/21/15
1
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