843003AGLF Datasheet, PDF (1/21 Pages) Integrated Device Technology – FEMTOCLOCKS™ CRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER

FEMTOCLOCKS™ CRYSTAL-TO-3.3V LVPECL
FREQUENCY SYNTHESIZER
ICS843003
General Description
Features
The ICS843003 is a 3 differential output LVPECL
ICS
Synthesizer designed to generate Ethernet refer-
HiPerClockS™ _{ence clock frequencies and is a member of the}
HiPerClocks™family of high performance clock
solutions from IDT. Using a 31.25MHz or
26.041666MHz, 18pF parallel resonant crystal, the following
frequencies can be generated based on the settings of 4 fre-
quency select pins (DIV_SEL[A1:A0], DIV_SEL[B1:B0]): 625MHz,
312.5MHz, 156.25MHz, and 125MHz. The 843003 has 2 output
banks, Bank A with 1 differential LVPECL output pair and Bank B
with 2 differential LVPECL output pairs.
The two banks have their own dedicated frequency select pins and
can be independently set for the frequencies mentioned above.
The ICS843003 uses IDT’s 3^rd generation low phase noise VCO
technology and can achieve 1ps or lower typical rms phase jitter,
easily meeting Ethernet jitter requirements. The ICS843003 is
packaged in a small 24-pin TSSOP package.
Pin Assignment
DIV_SELB0 1
VCO_SEL 2
MR 3
V_{CCO_A} 4
QA0 5
nQA0 6
OEB 7
OEA 8
FB_DIV 9
V_CCA 10
V_CC 11
DIV_SELA0 12
24 DIV_SELB1
23 VCCO_B
22 QB0
21 nQB0
20 QB1
19 nQB1
18 XTAL_SEL
17 TEST_CLK
16 XTAL_IN
15 XTAL_OUT
14 VEE
13 DIV_SELA1
• Three 3.3V LVPECL outputs on two banks, A Bank with one
LVPECL pair and B Bank with 2 LVPECL output pairs
• Using a 31.25MHz or 26.041666 crystal, the two output banks
can be independently set for 625MHz, 312.5MHz, 156.25MHz
or 125MHz
• Selectable crystal oscillator interface
or LVCMOS/LVTTL single-ended input
• VCO range: 560MHz – 700MHz
• RMS phase jitter @ 156.25MHz (1.875MHz - 20MHz):
0.51ps (typical)
Offset
Noise Power
100Hz ................ -96.8 dBc/Hz
1kHz .................. -119.1 dBc/Hz
10kHz ................ -126.4 dBc/Hz
100kHz .............. -127.0 dBc/Hz
• Full 3.3V supply mode
• 0°C to 70°C ambient operating temperature
• Industrial temperature available upon request
• Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
ICS843003
24-Lead TSSOP
Block Diagram
4.4mm x 7.8mm x 0.925mm
OEA ^Pullup
package body
DIV_SELA[1:0] ^{Pulldown:Pullup 2}
G Package
VCO_SEL ^Pullup
TEST_CLK ^Pulldown
0
XTAL_IN
OSC
1
XTAL_OUT
XTAL_SEL ^Pullup
FB_DIV ^Pulldown
DIV_SELB[1:0] ^{Pullup:Pulldown 2}
0
Phase
Detector
VCO
625MHz
1
FB_DIV
0 = ÷20 (default)
1 = ÷24
0 0 ÷1
0 1 ÷2 (default)
1 0 ÷4
1 1 ÷5
0 0 ÷1
0 1 ÷2
1 0 ÷4 (default)
1 1 ÷5
QA0
nQA0
QB0
nQB0
QB1
nQB1
MR ^Pulldown
OEB ^Pullup
IDT™ / ICS™ LVPECL FREQUENCY SYNTHESIZER
1
ICS843003AG REV. A OCTOBER 23, 2008