ICS952906A Datasheet, PDF (9/23 Pages) Integrated Circuit Systems – Programmable Timing Control Hub for Next Gen P4™ processor

Integrated
Circuit
Systems, Inc.
ICS952906A
I²C Table: Frequency Select Register
Byte 0
Pin #
Name
Bit 7
-
Bit 6
-
Bit 5
-
Bit 4
-
Bit 3
-
Bit 2
-
Bit 1
-
Bit 0
-
FS Source
FS6
FS5
FS4
FS3
FS2
FS1
FS0
Control
Function
Frequency H/W IIC
Select
Freq Select Bit 6
Freq Select Bit 5
Freq Select Bit 4
Freq Select Bit 3
Freq Select Bit 2
Freq Select Bit 1
Freq Select Bit 0
Type
RW
RW
RW
RW
RW
RW
RW
RW
0
1
Latch Inputs
IIC
See Table 1: QuadRom Frequency
Selection Table
PWD
0
0
0
0
0
0
0
0
I²C Table: Spreading and Device Behavior Control Register
Byte 1
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Pin #
-
-
-
-
-
45, 44
42,41
39, 38
Name
SS1
SS0
SS_EN
WDS_EN
Reserved
CPUCLKT/C_ITP,
CPU1T/C, CPU0T/C
CPUCLKT/C_1
CPUCLKT/C_0
Control
Function
Spread Select 1**
Spread Select 0**
Spread Enable Control
WD Soft Reset Enable
Reserved
Output Control
Output Control
Output Control
Type
RW
RW
RW
RW
RW
RW
RW
RW
0
00 = 0.20%
01 = 0.25%
ON
ON
-
Disable
Disable
Disable
** Spread program m ing only applies for ROM table entries 0001000 to 0001011 and 0010000 to 0010111
I²C Table: Output Control Register
Byte 2
Bit 7
Bit 6
Pin #
36
35
Name
25MHz_0
25MHz_1
Control
Function
Output Control
Output Control
Type
RW
RW
0
Disable
Disable
1
10 = 0.35%
Reserved
OFF
OFF
-
Enable
Enable
Enable
1
Enable
Enable
Bit 5
-
CPUT Stop Mode
0: CPUT Driven during
PD#; 1: Tri-stated
RW
Driven
Hi-Z
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
-
26
-
42,41
39, 38
Reserved
3V66_1
Reserved
CPUCLKT/C_1
CPUCLKT/C_0
Reserved
RW
Output Control
RW
Reserved
RW
Output Stop Control RW
Output Stop Control RW
-
Disable
-
Free Run
Free Run
-
Enable
-
Stoppable
Stoppable
PWD
0
1
1
0
1
1
1
1
PWD
1
1
0
1
1
1
1
1
I²C Table: Output Control Register
Byte 3
Pin #
Name
Bit 7
-
Bit 6
20
Bit 5
19
Bit 4
16
Bit 3
15
Bit 2
14
Bit 1
13
Bit 0
12
ASEL1
PCICLK6
PCICLK5
PCICLK4
PCICLK3
PCICLK2
PCICLK1
PCICLK0
Control
Function
3V66/PCI Freq Select
Output Control
Output Control
Output Control
Output Control
Output Control
Output Control
Output Control
Type
0
1
RW See Table 5: Async AGP/PCI Freq Table
RW
Disable
Enable
RW
Disable
Enable
RW
Disable
Enable
RW
Disable
Enable
RW
Disable
Enable
RW
Disable
Enable
RW
Disable
Enable
PWD
0
1
1
1
1
1
1
1
1236A—08/06/07
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