ICS952906A Datasheet, PDF (13/23 Pages) Integrated Circuit Systems – Programmable Timing Control Hub for Next Gen P4™ processor

Integrated
Circuit
Systems, Inc.
ICS952906A
I²C Table: Output Divider Control Register
Byte 15
Pin #
Name
Bit 7
-
Bit 6
-
Bit 5
-
Bit 4
-
Bit 3
-
Bit 2
-
Bit 1
-
Bit 0
-
25MHz Div3
25Mhz Div2
25MHz Div1
25MHz Div0
CPU Div3
CPU Div2
CPU Div1
CPU Div0
Control
Function
25MHz Divider Ratio
Programming Bits
CPUDivider Ratio
Programming Bits
Type
RW
RW
RW
RW
RW
RW
RW
RW
0
1
0000:/2
0001:/3
0010:/5
0011:/7
0000:/2
0001:/3
0010:/5
0011:/7
0100:/4
0101:/6
0110:/10
0111:/14
0100:/4
0101:/6
0110:/10
0111:/14
1000:/8
1001:/12
1010:/20
1011:/28
1000:/8
1001:/12
1010:/20
1011:/28
1100:/16
1101:/24
1110:/40
1111:/56
1100:/16
1101:/24
1110:/40
1111:/56
PWD
X
X
X
X
X
X
X
X
I²C Table: Output Divider Control Register
Byte 16
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Pin #
-
-
-
-
-
-
-
-
Name
Reserved
Reserved
Reserved
Reserved
3V66Div3
3V66Div2
3V66Div1
3V66Div0
Control
Function
Reserved
3V66/PCI Divider Ratio
Programming Bits for
Mode 1
Type
RW
RW
RW
RW
RW
RW
RW
RW
0
1
-
-
-
-
-
-
-
-
0000:/2 0100:/4 1000:/8 1100:/16
0001:/3 0101:/6 1001:/12 1101:/24
0010:/5 0110:/10 1010:/20 1110:/40
0011:/7 0111:/14 1011:/28 1111:/56
PWD
X
X
X
X
X
X
X
X
I²C Table: Output Divider Control Register
Byte 17
Pin #
Name
Bit 7
-
Bit 6
-
Bit 5
-
Bit 4
-
Bit 3
-
Bit 2
-
Bit 1
-
Bit 0
-
Reserved
Reserved
Reserved
CPUINV
Reserved
Reserved
Reserved
Reserved
Control
Function
Reserved
Reserved
Reserved
CPU Phase Invert
Reserved
Reserved
Reserved
Reserved
Type
RW
RW
RW
RW
RW
RW
RW
RW
0
-
-
-
Default
-
-
-
-
1
-
-
-
Inverse
-
-
-
-
PWD
X
X
X
1
1
1
1
1
I²C Table: Group Skew Control Register
Byte 18
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Pin #
-
-
-
-
-
-
-
-
Name
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Control
Type
0
Function
Reserved
RW
-
Reserved
RW
-
Reserved
RW
-
Reserved
RW
-
Reserved
RW
-
Reserved
RW
-
Reserved
RW
-
Reserved
RW
-
1
PWD
-
0
-
0
-
0
-
0
-
0
-
0
-
0
-
0
1236A—08/06/07
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