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ICS9248-110 Datasheet, PDF (9/14 Pages) Integrated Circuit Systems – AMD-K7TM System Clock Chip
ICS9248-110
I2C Command Bitmaps
Byte 4: Clock Control Register
Bit Pin# Default
Description
71
1 REF0 enable
6 23
1 24MHz/48MHz enable
5 22
1 USB0 enable
4 20
1 AGP1 enable
3 19
1 AGP0 enable
2 42, 43 1 CPUCLK2 enable (both of differential pair, True" and "Complimentary"
1 39, 40 1 CPUCLK1 enable (both of differential pair, True" and "Complimentary"
0 36, 37 1 CPUCLK0 enable (both of differential pair, True" and "Complimentary"
Notes: A value of '1'b is enable, '0'b is disable
Byte 5: PCI Clock Control Register
Bit Pin# Default
72
1 REF1 enable
6 17
1 PCICLK6 enable
5 16
1 PCICLK5 enable
4 14
1 PCICLK4 enable
3 13
1 PCICLK3 enable
2 11
1 PCICLK2 enable
1 10
1 PCICLK1 enable
08
1 PCICLK0 enable
Notes: A value of '1'b is enable, '0'b is disable
Description
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