ICS680-01 Datasheet, PDF (8/8 Pages) Integrated Circuit Systems – Networking Clock Synthesizer and Zero Delay Buffer

ICS680-01
Networking Clock Synthesizer and Zero Delay Buffer
Revision History
Rev.
D
E
F
Originator
P.Griffith
P.Griffith
J. Sarma
Date Description of Change
10/01/04
Removed power supply ramp-up time spec; added trinary input specs to DC chars; added
a second Output Low Voltage spec; updated Supply Current specs from 50 to 32 mA, and
50 to 300 uA; changed pull-down resistor value from 525 to 250 kohms; changed Output
Rise/Fall times from 1 to 1.5 ns
12/21/04 Released as standard product from custom device.
02/03/05 Add LF ordering info.
MDS 680-01 F
8
Revision 020305
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel [phone] ● www.icst.com