ICS87973I-147 Datasheet, PDF (7/16 Pages) Integrated Circuit Systems – LOW SKEW, 1-TO-12 LVCMOS / LVTTL CLOCK MULTIPLIER/ZERO DELAY BUFFER

Integrated
Circuit
Systems, Inc.
ICS87973I-147
LOW SKEW, 1-TO-12
LVCMOS / LVTTL CLOCK MULTIPLIER/ZERO DELAY BUFFER
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, V_DD
Inputs, V_I
Outputs, V
O
Package Thermal Impedance, θ_JA
Storage Temperature, T_STG
4.6V
-0.5V to V_DD + 0.5 V
-0.5V to V + 0.5V
DDO
42.3°C/W (0 lfpm)
-65°C to 150°C
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifications only. Functional
operation of product at these conditions or any conditions be-
yond those listed in the DC Characteristics or AC Character-
istics is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect product reliability.
TABLE 4A. POWER SUPPLY DC CHARACTERISTICS, V_DD = V_DDA = V_DDO = 3.3V±5%, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum Typical
V_DD
Core Supply Voltage
V_DDA
Analog Supply Voltage
V_DDO
Output Supply Voltage
I_DD
Power Supply Current
I_DDA
Analog Supply Current
NOTE: Special thermal handling may be required in some configurations.
3.135
3.3
2.935
3.3
3.135
3.3
Maximum
3.465
3.465
3.465
225
20
Units
V
V
V
mA
mA
TABLE 4B. DIFFERENTIAL DC CHARACTERISTICS, V_DD = V_DDA = V_DDO = 3.3V±5%, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum Typical
V_IH
Input High Voltage
LVCMOS Inputs
2
V_IL
Input Low Voltage
LVCMOS Inputs
-0.3
I_IN
Input Current
V_OH
Output High Voltage
I_OH = -20mA
2.4
V_OL
Output Low Voltage
I_OL = 20mA
V_PP
Peak-to-Peak Input Voltage; NOTE 1, 2
CLK, nCLK
0.3
V_CMR
Common Mode Input Voltage; NOTE 1, 2
CLK, nCLK
V_DD - 2V
NOTE 1: Common mode voltage is defined as V_IH of the differential signal.
NOTE 2. For single ended applications, the maximum input voltage for CLK and nCLK is V_DD + 0.3V.
Maximum
V_DD + 0.3
0.8
±120
0.5
1
V_DD - 0.6V
Units
V
V
µA
V
V
V
V
TABLE 5. INPUT FREQUENCY CHARACTERISTICS, V_DD = V_DDA = V_DDO = 3.3V±5%, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum Units
CLK0, CLK1,
f_IN
Input Frequency ^{CLK, nCLK; NOTE 1}
FRZ_CLK
120
MHz
20
MHz
NOTE 1: Input frequency depends on the feedback divide ratio to ensure "clock * Feedback Divide" is in the VCO range of
240MHz to 500MHz.
87973DYI-147
www.icst.com/products/hiperclocks.html
7
REV. A AUGUST 26, 2003