ICS8430-111 Datasheet, PDF (7/16 Pages) Integrated Circuit Systems – 700MHZ, LOW JITTER DIFFERENTIAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER

Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS8430-111
700MHZ, LOW JITTER
DIFFERENTIAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
TABLE 6. AC CHARACTERISTICS, V_CC = V_CCA = V_CCO = 3.3V±5%, TA = 0°C TO 70°C
Symbol Parameter
F_MAX
Output Frequency
tjit(cc) Cycle-to-Cycle Jitter; NOTE 1
Test Conditions
fOUT > 87.5MHz
fOUT < 87.5MHz
Minimum
Typical
Maximum
700
25
40
tjit(per) Period Jitter, RMS
9.5
tsk(o) Output Skew; NOTE 1, 2
15
t_R / t_F
Output Rise/Fall Time
20% to 80%
200
700
M, N to nP_LOAD
5
t_S
Setup Time
S_DATA to S_CLOCK
5
S_CLOCK to S_LOAD
5
M, N to nP_LOAD
5
t_H
Hold Time
S_DATA to S_CLOCK
5
S_CLOCK to S_LOAD
5
odc
Output Duty Cycle
N≠1
48
52
N=1
45
55
t_LOCK
PLL Lock Time
1
See Parameter Measurement Information section.
NOTE 1:This parameter is defined in accordance with JEDEC Standard 65.
NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions.
Measured at the output differential cross points.
Units
MHz
ps
ps
ps
ps
ps
ns
ns
ns
ns
ns
ns
%
%
ms
8430DY-111
www.icst.com/products/hiperclocks.html
7
REV. F JUNE 1, 2005