ICS9248-192 Datasheet, PDF (6/12 Pages) Integrated Circuit Systems – Frequency Timing Generator for Transmeta Systems

ICS9248-192
Byte 1: PCI Stop
BIT PIN#
Bit 7 12
Bit 6 11
Bit 5 10
Bit 4 7
Bit 3 6
Bit 2 5
Bit 1 -
Bit 0 -
Note:
1 = Inactive
0 = Active
PWD
1
1
1
1
1
1
X
X
DESCRIPTION
PCICLK5
PCICLK4
PCICLK3
PCICLK2
PCICLK1
PCICLK0
Reserved
Reserved
Byte 3:Free-Running Enable
BIT PIN# PWD
DESCRIPTION
Bit 7 12 1 PCICLK5
Bit 6 11 1 PCICLK4
Bit 5 10 1 PCICLK3
Bit 4 7
1 PCICLK2
Bit 3 6
1 PCICLK1
Bit 2 5
1 PCICLK0
Bit 1 -
X Reserved
Bit 0 -
X Reserved
Note:
0 = Not free-running (controlled by PCI_STOP# pin)
1 = Free-running (can override Byte1 PCI Stop Control)
Byte 5: Reserved
BIT
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PIN#
-
-
-
-
-
-
-
-
PWD
DESCRIPTION
X Reserved
X Reserved
X Reserved
X Reserved
X Reserved
X Reserved
X Reserved
X Reserved
Note: PWD = Power-Up Default
Byte 2: Stop Clocks
BIT PIN# PWD
DESCRIPTION
Bit 7 16 1 48MHz
Bit 6 15 1 48_24MHz
Bit 5 23
1 CPUCLK0
Bit 4 27
1 REF
Bit 3 -
X Reserved
Bit 2 -
X Reserved
Bit 1 -
X Reserved
Bit 0 -
X Reserved
Note:
1 = Inactive
0 = Active
Byte 4: Reserved
BIT
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PIN#
-
-
-
-
-
-
-
-
PWD
DESCRIPTION
X Reserved
X Reserved
X Reserved
X Reserved
X Reserved
X Reserved
X Reserved
X Reserved
Byte 6: Reserved
BIT
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PIN#
-
-
-
-
-
-
-
-
PWD
DESCRIPTION
0 Reserved
0 Reserved
0 Reserved
0 Reserved
0 Reserved
1 Reserved
1 Reserved
0 Reserved
0540E—08/20/03
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