ICS9248-146 Datasheet, PDF (6/16 Pages) Integrated Circuit Systems – Frequency Generator & Integrated Buffers for Celeron & PII/III™

ICS9248-146
Absolute Maximum Ratings
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND –0.5 V to V_DD +0.5 V
Ambient Operating Temperature . . . . . . . . . . . . . 0°C to +70°C
Case Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 115°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are
stress specifications only and functional operation of the device at these or any other conditions above those listed in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods
may affect product reliability.
Electrical Characteristics - Input/Supply/Common Output Parameters
TA = 0 - 70º C; Supply Volt age VDD = 3.3 V +/-5%VDDL = 2.5 V +/-5% (unless otherwise stated)
PARAMETER SYMBOL
CONDITIONS
MIN TYP MAX UNITS
Input High Voltage
V_IH
Input Low Voltage
V_IL
Supply Current
I_DD
Power Down
PD
C_L=30 pF, CPU @ 66, 100 MHz
2
V_DD+0.3 V
V_SS-0.3
0.8
V
390 400 mA
300 600 µA
Input frequency
Input Capacitance1
Transition Time
Settling Time
Clk Stabilization¹
Skew
Skew
Fi
C_IN
C_INX
T_trans
T_S
T_STAB
T_CPU-PCI
T_CPU-SDRAM
V_DD = 3.3 V;
Logic Inputs
X1 & X2 pins
To 1st crossing of target Freq.
From 1st crossing to 1% target Freq.
From V_DD= 3.3 V to 1% target Freq.
CPUV_T= 1.5 V PCI V_T=1.25V
CPUV_T= 1.5 V SDRAM V_T=1.25
12 14.318 16
5
27
45
3
3
1
1.9
4
-500 -300 0
MHz
pF
pF
ms
ns
ps
1 _{Guaranteed by design, not 100% tested in production.}
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