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ICS9248-146 Datasheet, PDF (3/16 Pages) Integrated Circuit Systems – Frequency Generator & Integrated Buffers for Celeron & PII/III™
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ICS9248-146
Serial Configuration Command Bitmap
Byte0: Functionality and Frequency Select Register (default = 0)
Bit
Bit 2
Bit 7:4
Bit 3
Bit 1
Bit 0
Description
Bit 7 Bit 6 Bit 5 Bit 4
Bit 2
FS3 FS2 FS1 FS0
CPU SDRAM PCI
AGP
SEL = 0
000
0
0 66.67 66.67 33.33 66.67
000 0
1 100.00 100.00 33.33 66.67
0 0 0 1 0 166.67 166.67 33.33 66.66
000
1
1 133.33 133.33 33.33 66.67
00
10
0 66.67 100.00 33.33 66.67
00 10
1 100.00 66.67 33.33 66.67
0 0 1 1 0 100.00 133.33 33.33 66.67
00
1
1
1 133.33 100.00 33.33 66.67
0
10
0
0 112.00 112.00 33.60 67.20
0 10 0
1 124.00 124.00 31.00 62.00
0
10
1
0 138.00 138.00 34.50 69.00
0
10
1
1 150.00 150.00 30.00 60.00
0
110
0 66.67 133.33 33.33 66.67
0 110
1 100.00 150.00 30.00 60.00
0 1 1 1 0 150.00 100.00 30.00 60.00
0
11
1
1 160.00 120.00 30.00 60.00
10 0
0
0 103.00 103.00 34.33 68.67
100 0
1 100.30 100.30 33.43 66.87
10 0
1
0 200.00 200.00 33.33 66.67
10 0
1
1 133.73 133.73 33.43 66.87
10
10
0 103.00 137.33 34.33 68.67
10 1 0
1 137.33 103.00 34.33 68.67
1 0 1 1 0 66.87 100.30 33.43 66.87
10
1
1
1 133.73 100.30 33.43 66.87
1 10
0
0 110.00 110.00 33.00 66.00
110 0
1 115.00 115.00 34.50 69.00
1 1 0 1 0 140.00 140.00 35.00 70.00
1 10
1
1 101.50 101.50 33.83 67.67
1110
0 100.30 133.73 33.43 66.87
1110
1 105.00 140.00 35.00 70.00
1 1 1 1 0 105.00 157.50 31.50 63.00
111
1
1 135.33 101.50 33.83 67.67
0 - Frequency is selected by hardware select, Latched Inputs
1 - Frequency is selected by Bit , 2 7:4
0 - Normal
1 - Spread Spectrum Enabled
0 - Running
1- Tristate all outputs
AGP
SEL = 1
50.00
50.00
55.56
50.00
50.00
50.00
50.00
50.00
56.00
46.50
51.75
50.00
50.00
50.00
50.00
48.00
50.00
50.00
50.00
50.15
51.50
51.50
50.15
50.15
55.00
57.50
52.50
50.00
50.15
52.50
52.50
50.75
Spread Precentage
0 to -0.5% Down Spread
0 to -0.5% Down Spread
+/- 0.25% Center Spread
0 to -0.5% Down Spread
0 to -0.5% Down Spread
0 to -0.5% Down Spread
0 to -0.5% Down Spread
0 to -0.5% Down Spread
+/- 0.25% Center Spread
+/- 0.25% Center Spread
+/- 0.25% Center Spread
+/- 0.25% Center Spread
0 to -0.5% Down Spread
+/- 0.25% Center Spread
+/- 0.25% Center Spread
+/- 0.25% Center Spread
+/- 0.25% Center Spread
+/- 0.25% Center Spread
+/- 0.25% Center Spread
+/- 0.25% Center Spread
+/- 0.25% Center Spread
+/- 0.25% Center Spread
+/- 0.25% Center Spread
+/- 0.25% Center Spread
+/- 0.25% Center Spread
+/- 0.25% Center Spread
+/- 0.25% Center Spread
+/- 0.25% Center Spread
+/- 0.25% Center Spread
+/- 0.25% Center Spread
+/- 0.25% Center Spread
+/- 0.25% Center Spread
PWD
00000
Note1
0
1
0
Note1:
Default at power-up will be for latched logic inputs to define frequency, as displayed by Bit 3.
Note: PWD = Power-Up Default
Third party brands and names are the property of their respective owners.
3
I2C is a trademark of Philips Corporation
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