ICS9DB108 Datasheet, PDF (4/15 Pages) Integrated Circuit Systems – Eight Output Differential Buffer for PCI-Express

Integrated
Circuit
Systems, Inc.
ICS9DB108
General Description
ICS9DB108 follows the Intel DB400 Differential Buffer Specification. This buffer provides four SRC clocks for PCI-Express,
next generation I/O devices. ICS9DB108 is driven by a differential input pair from a CK409/CK410 main clock generator, such
as the ICS952601 or ICS954101. ICS9DB108 can run at speeds up to 200MHz. It provides ouputs meeting tight cycle-to-cycle
jitter (50ps) and output-to-output skew (50ps) requirements.
Block Diagram
8
OE(7:0)
SRC_IN
SRC_IN#
SRC_DIV#
HIGH_BW#
SRC_STOP#
PD#
BYPASS#/PLL
SDATA
SCLK
CONTROL
LOGIC
SPREAD
COMPATIBLE
PLL
STOP
8
LOGIC
DIF(7:0)
IREF
0723D—01/08/04
4