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ICS581-01 Datasheet, PDF (4/6 Pages) Integrated Circuit Systems – Zero-Delay Glitch-Free Clock Multiplexer
ICS581-01, -02
Zero-Delay Glitch-Free Clock Multiplexer
Application Example
A typical application for the ICS581-02 is to provide a backup clock for a system. The backup, reliable clock
would be connected to INB while the main clock would be connected to INA. If the main clock failed, the
backup clock would automatically be switched in. The following example shows the connection for this.
VDD
0.01µF
MAIN
BACKUP
S0
S1
VDD
INA
INB
GND
FBIN
OE0
DIV
VDD
CLK1
CLK2
CLK3
CLK4
GND
OE1
0.01µF
33Ω
33Ω
33Ω
In this example, the clocks are 155 MHz and so the frequency range is address 11. Both S0 and S1 are left
unconnected and so the on-chip pull-ups give the required high inputs. Similarly for OE0, OE1 and DIV. In
this example, CLK4 is used as the feedback.
External Components
The ICS581-01 and -02 require two 0.01 µF capacitors between VDD and GND, one on each side of the
chip. These must be close to the chip to minimize lead inductance. Series termination resistors of 33 Ω can
be used on the outputs. These also should be close to the chip, with the feedback connection after the
resistor.
MDS 581-01, 581-02 A
4
Revision 041100
Printed 11/14/00
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