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ICS581-01 Datasheet, PDF (1/6 Pages) Integrated Circuit Systems – Zero-Delay Glitch-Free Clock Multiplexer | |||
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ICS581-01, -02
Zero-Delay Glitch-Free Clock Multiplexer
Description
Features
The ICS581-01 and ICS581-02 are glitch free,
Phase Locked Loop (PLL) based clock multiplexers
(mux) with zero delay from input to output. They
each have 4 low skew outputs which can be
configured as a single output, 3 outputs or 4
outputs. The ICS581-01 allows user control over
the mux switching. The ICS581-02 has automatic
switching between the 2 clock inputs.
The ICS581-01 and -02 are members of the ICS
Clock Blocks⢠family of clock generation,
synchronization, and distribution devices. For a
non-PLL based clock mux, see the ICS580-01.
Block Diagrams
⢠Tiny 16 pin TSSOP package
⢠No short pulses or glitches on output. Operates to
200 MHz
⢠User controlled (ICS581-01) or automatic, timed
(ICS581-02) switch
⢠Low skew outputs
⢠Ideal for systems with backup or redundant clocks
⢠Zero delay, input to output
⢠50% output duty cycle allows duty cycle correction
⢠Spread Smart⢠technology works with spread
spectrum parts
INA
INB
FBIN
ICS581-01
1
0
SELA
OE0
OE1
CLK1
OE0
CLK2
PLL
2
CLK3
S0, S1
CLK4
OE1
External Feedback
÷48 1
÷3 0
IN
NO_INA
Transition
Detector
DIV
INA
1
INB
0
CLK1
OE0
CLK2
FBIN
ICS581-02
PLL
OE0
2
OE1
S0, S1
CLK3
CLK4
OE1
External Feedback
MDS 581-01, 581-02 A
1
Revision 041100
Printed 11/14/00
Integrated Circuit Systems, Inc. ⢠525 Race Street ⢠San Jose â¢CAâ¢95126⢠(408) 295-9800tel ⢠www.icst.com
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