ICS581-01 Datasheet, PDF (2/6 Pages) Integrated Circuit Systems – Zero-Delay Glitch-Free Clock Multiplexer

Pin Assignment
S0 1
S1 ₂
VDD ₃
INA 4
INB 5
GND 6
FBIN 7
OE0 8
ICS581-01, -02
Zero-Delay Glitch-Free Clock Multiplexer
16 SELA
15 VDD
14 CLK1
13 CLK2
12 CLK3
11 CLK4
10 _GND
9 OE1
S0 1
S1 ₂
VDD ₃
INA 4
INB 5
GND 6
FBIN 7
OE0 8
16 DIV
15 VDD
14 CLK1
13 CLK2
12 CLK3
11 CLK4
10 GND
9 OE1
Clock Decoding
SELA
0
1
ICS581-01 only
CLK1:4
INB
INA
Timeout Selection
DIV
Nominal Timeout
0
3xPeriod of INB
1
48xPeriod of INB
ICS581-02 only
Tri-State and Power Down
OE1 OE0 CLK1 CLK2,3,4 PLL
0
0
Z
Z
Off
0
1
On
Z
On
1
0
Z
On
On
1
1
On
On
On
ICS581-01,-02
Frequency Range Select
S1
S0 Input Range (MHz)
0
0
50-150
0
1
19-75
1
0
6-19
1
1
150-200
ICS581-01,-02
Pin Descriptions
Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
16
Name
S0
S1
VDD
INA
INB
GND
FBIN
OE0
OE1
GND
CLK4
CLK3
CLK2
CLK1
VDD
SELA
DIV
Type
I
I
P
I
I
P
I
I
I
P
O
O
O
O
P
I
I
Chip
-01, -02
-01, -02
-01, -02
-01, -02
-01, -02
-01, -02
-01, -02
-01, -02
-01, -02
-01, -02
-01, -02
-01, -02
-01, -02
-01, -02
-01, -02
-01 only
-02 only
Description
Select 0 for frequency range. See table. Internal pull-up.
Select 1 for frequency range. See table. Internal pull-up.
Connect to +3.3 V or + 5 V.
Input Clock A.
Input Clock B.
Connect to ground.
Feedback input. Connect to a clock output.
Output Enable0. See Table. Internal pull-up.
Output Enable1. See Table. Internal pull-up.
Connect to ground.
Low skew clock output.
Low skew clock output.
Low skew clock output.
Low skew clock output.
Connect to +3.3 V or + 5 V.
Mux select. Selects INA when high. Internal pull-up.
Timeout select. See table. Internal pull-up.
Key: I = Input; O = output; P = power supply connection
MDS 581-01, 581-02 A
2
Revision 041100
Printed 11/14/00
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126• [phone]tel • www.icst.com