M1033 Datasheet, PDF (3/14 Pages) Integrated Circuit Systems – VCSO BASED CLOCK PLL WITH AUTOSWITCH

Integrated
Circuit
Systems, Inc.
DETAILED BLOCK DIAGRAM
M1033/34
M1033/34
VCSO BASED CLOCK PLL WITH AUTOSWITCH
Product Data Sheet
OP_IN
R_LOOP C_LOOP
R_LOOP C_LOOP
nOP_IN OP_OUT
R_POST
R_POST
C_POST
C_POST
nOP_OUT nVC VC
External
Loop Filter
Components
NBW
DIF_REF0
nDIF_REF0
DIF_REF1
nDIF_REF1
LOR
REF_ACK
REF_SEL
AUTO
MR_SEL3:0 ⁴
P_SEL1:0 ²
Activity
Detector
Activity
Detector
MUX
0
R Div
1
0
1
PLL
Phase
Detector ^RIN
R_IN
Auto
Ref Sel
1
0
M / R Divider
LUT
Loop Filter
Amplifier
M Divider
Phase
Locked
Loop
(PLL)
SAW Delay Line
Phase
Shifter
VCSO
P Divider
LUT
P Divider
(1, 2, or TriState)
TriState
FOUT
nFOUT
DIVIDER SELECTION TABLES
Figure 3: Detailed Block Diagram
M and R Divider Look-Up Tables (LUT)
The MR_SEL3:0 pins select the feedback and reference
divider values M and R to enable adjustment of loop
bandwidth and jitter tolerance. The look-up tables vary
by device variant. M1033 and M1034 are defined in
Tables 3 and 4 respectively.
M1033 M/R Divider LUT
Total
MR_SEL3:0 M Div R Div PLL
Ratio
Fin for
155.52MHz
VCSO (MHz)
Phase Det.
Freq. for
155.52MHz
VCSO (MHz)
0000 8 1
8
19.44
19.44
0 0 0 1 32 4
8
19.44
4.86
0 0 1 0 128 16 8
19.44
1.215
0 0 1 1 512 64 8
19.44
0.30375
0100 2 1
2
77.76
77.76
0101 8 4
2
77.76
19.44
0 1 1 0 32 16 2
77.76
4.86
0 1 1 1 128 64 2
77.76
1.215
1000 1 1
1
155.52
155.52
1001 4 4
1
155.52
38.88
1 0 1 0 16 16 1
155.52
9.72
1 0 1 1 64 64 1
155.52
2.43
1 1 0 0 Test Mode¹ N/A
N/A
N/A
1101 1
4 0.25
622.08
155.52
1 1 1 0 4 16 0.25
622.08
38.88
1 1 1 1 16 64 0.25
622.08
9.72
Table 3: M1033 M/R Divider LUT
Note 1: Factory test mode; do not use.
Tables 3 and 4 provide example Fin and phase
detector frequencies with 155.52MHz VCSO
devices (M1033-11-155.5200 and M1034-11-155.5200).
See “Ordering Information” on pg. 14.
M1034 M/R Divider LUT
Total
MR_SEL3:0 M Div R Div PLL
Ratio
Fin for
155.52MHz
VCSO (MHz)
Phase Det.
Freq. for
155.52MHz
VCSO (MHz)
0000 4 1
4
38.88
38.88
0 0 0 1 16 4
4
38.88
9.72
0 0 1 0 64 16
4
38.88
2.43
0 0 1 1 256 64
4
38.88
0.6075
0100 2 1
2
77.76
77.76
0101 8 4
2
77.76
19.44
0 1 1 0 32 16
2
77.76
4.86
0 1 1 1 128 64
2
77.76
1.215
1000 1 1
1
155.52
155.52
1001 4 4
1
155.52
38.88
1 0 1 0 16 16
1
155.52
9.72
1 0 1 1 64 64
1
155.52
2.43
1 1 0 0 Test Mode¹ N/A
N/A
N/A
1 1 0 1 1 4 0.25 622.08
155.52
1 1 1 0 4 16 0.25 622.08
38.88
1 1 1 1 16 64 0.25 622.08
9.72
Table 4: M1034 M/R Divider LUT
Note 1: Factory test mode; do not use.
M1033/34 Datasheet Rev 1.0
3 of 14
Revised 07Apr2005
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