ICS9248-92 Datasheet, PDF (3/14 Pages) Integrated Circuit Systems – Mobile Pentium IITM System Clock Chip

ICS9248-92
Power-On Conditions
SEL
100/66.6#
MODE
1
1
0
1
1
0
0
0
PIN #
41, 42
16, 14, 13, 12,
11, 9, 8
41, 42
16, 14, 13, 12,
11, 9, 8
26
27
8
41, 42
16, 14, 13, 12,
11, 9
26
27
8
41, 42
16, 14, 13, 12,
11, 9
DESCRIPTION
CPUCLKs
PCICLKs
CPUCLKs
PCICLKs
PCI_STOP#
CPU_STOP#
PCICLK_F
CPUCLKs
PCICLKs
PCI_STOP#
CPU_STOP#
PCICLK_F
CPUCLKs
PCICLKs
FUNCTION
100 MHz - w/serial config enable/disable
33.3 MHz - w/serial config enable/disable
66.6 MHz - w/serial config enable/disable
33.3 MHz - w/serial config enable/disable
Power Management, PCI [0:5] Clocks
Stopped when low
Power Management, CPU [0:5] Clocks
Stopped when low
33.3 MHz - PCI Clock Free running
100 MHz - CPU Clocks w/external Stop Control and serial
config individual enable/disable.
33.3 MHz - PCI Clocks w/external Stop control and serial
config individual enable/disable.
Power Management, PCI [0:5] Clocks
Stopped when low
Power Management, CPU [0:5] Clocks
Stopped when low
33.3 MHz - PCI Clock Free running for Power Management
66.6 MHz - CPU Clocks w/external Stop control and serial
config individual enable/disable.
33.3 MHz - PCI Clocks w/external Stop control and serial
config individual enable/disable.
Example:
a) if MODE = 1, pins 26 and 27 are configured as SDRAM7 and SDRAM6 respectively.
b) if MODE = 0, pins 26 and 27 are configured as PCI_STOP# and CPU_STOP# respectively.
Power-On Default Conditions
At power-up and before device programming, all clocks will default to an enabled and “on” condition. The frequencies that are then produced
are on the MODE pin as shown in the table below.
CLOCK
REF (0:2)
48/24 MHz
DEFAULT CONDITION AT POWER-UP
14.31818 MHz
48 MHz
3