ICS9248-92 Datasheet, PDF (13/14 Pages) Integrated Circuit Systems – Mobile Pentium IITM System Clock Chip

ICS9248-92
General Layout Precautions:
1) Use a ground plane on the top routing
layer of the PCB in all areas not used
by traces.
2) Make all power traces and ground
traces as wide as the via pad for lower
inductance.
Notes:
1 All clock outputs should have
provisions for a 15pf capacitor
between the clock output and series
terminating resistor. Not shown in all
places to improve readability of
diagram.
2 Optional crystal load capacitors are
recommended. They should be
included in the layout but not inserted
unless needed.
Component Values:
C1 : Crystal load values determined by user
C2 : 22 F/20V/D case/Tantalum
AVX TAJD226M020R
C3 : 15pF capacitor
FB = Fair-Rite products 2512066017X1
All unmarked capacitors are 0.01 F ceramic
VDD
Ferrite
Bead
C2
22µF/20V
Tantalum
1
3.3V Power Route
2
3
C1
4
C1
5
2
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
C2
22µF/20V
Tantalum
Ferrite
Bead
VDD
48
47
46
45
44
43
C4
42
41
40
C3
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1
Clock Load
2.5V Power Route
3.3V Power Route
Connections to VDD:
= Routed Power
= Ground Connection Key (component side copper)
= Ground Plane Connection
= Power Route Connection
= Solder Pads
= Clock Load
13