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ICS84025 Datasheet, PDF (2/12 Pages) Integrated Circuit Systems – CRYSTAL-TO-LVCMOS / LVTTL FREQUENCY SYNTHESIZER WITH FANOUT BUFFER
Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS84025
CRYSTAL-TO-LVCMOS / LVTTL
FREQUENCY SYNTHESIZER WITH FANOUT BUFFER
TABLE 1. PIN DESCRIPTIONS
Number
1, 5, 9, 13
2
3, 7, 11, 15, 19
4
6
8
10
12
14
16
17
18
20, 21
22
23
Name
VDDO
Q0
GND
Q1
Q2
Q3
Q4
Q5
nc
PLL_SEL
V
DD
VDDA
XTAL2, XTAL1
MR
F_SEL1
Type
Description
Power
Output supply pins.
Output
Clock output. LVCMOS/LVTTL interface levels.
Power
Power supply ground.
Output
Clock output. LVCMOS/LVTTL interface levels.
Output
Clock output. LVCMOS/LVTTL interface levels.
Output
Clock output. LVCMOS/LVTTL interface levels.
Output
Clock output. LVCMOS/LVTTL interface levels.
Output
Clock output. LVCMOS/LVTTL interface levels.
Unused
No connect.
Input
Pullup
Selects between the PLL and crystal inputs as the input
to the dividers. When HIGH, selects PLL. When LOW,
selects XTAL1, XTAL2. LVCMOS / LVTTL interface levels.
Power
Core supply pin.
Power
Analog supply pin.
Input
Input
Pulldown
Crystal oscillator interface. XTAL1 is the input. XTAL2 is the output.
Active HIGH Master Reset. When logic HIGH, the internal dividers
are reset causing the outputs to go low. When logic LOW, the
internal dividers and the outputs are enabled.
LVCMOS / LVTTL interface levels.
Input Pulldown Feedback frequency select pin. LVCMOS/LVTTL interface levels.
24
F_SEL0
Input Pullup Output frequency select pin. LVCMOS / LVTTL interface levels.
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol
CIN
RPULLUP
RPULLDOWN
Parameter
Input Capacitance
Input Pullup Resistor
Input Pulldown Resistor
CPD
Power Dissipation Capacitance
(per output)
Test Conditions
VDD, VDDO = 3.465V
VDD = 3.465V, VDDO = 2.625V
VDD = 3.465V, VDDO = 1.95V
Minimum
Typical
51
51
TBD
TBD
TBD
Maximum
4
Units
pF
KΩ
KΩ
pF
pF
pF
84025EM
www.icst.com/products/hiperclocks.html
2
REV. A APRIL 16, 2003