ICS950220 Datasheet, PDF (17/20 Pages) Integrated Circuit Systems – Programmable Timing Control Hub™ for P4™

Integrated
Circuit
Systems, Inc.
ICS950220
3V66 & PCI Phase Relationship
All 3V66 clocks are to be in pphase with each other. In the case where 3V66_1 is configured as 48MHz VCH clock, there is no
defined phase relationship between 3V66_1/VCH and other 3V66 clocks. The PCI group should lag 3V66 by the standard
skew described below as Tpci.
3V66 (1:0)
3V66 (4:2)
3V66_5
Tpci
PCICLK_F (2:0) PCICLK (6:0)
Group Skews at Common Transition Edges
GROUP
SYMBOL
CONDITIONS
MIN
3V66
3V66 3V66 (5:0) pin to pin skew
0
PCI
PCI PCI_F (2:0) and PCI (6:0) pin to pin skew 0
3V66 to PCI
S_3V66-PCI 3V66 (5:0) leads 33MHz PCI
1.5
1_{Guaranteed by design, not 100% tested in production.}
TYP
MAX UNITS
500 ps
500 ps
3.5 ns
PD# Functionality
CPU_STOP# CPUT
1
Normal
0
iref * Mult
CPUC
Normal
Float
3V66
66MHz
Low
66MHz_OUT
PCICLK_F
PCICLK
PCICLK
USB/DOT
48MHz
66MHz_IN 66MHz_IN 66MHz_IN 48MHz
Low
Low
Low
Low
0467F—07/28/05
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