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ICS9250-16 Datasheet, PDF (14/17 Pages) Integrated Circuit Systems – Frequency Generator & Integrated Buffers for Celeron & PII/III™
ICS9250-16
Group Skews (CPU = 66 MHz)
TA = 0 - 70º C; VDD = 3.3 V +/-5%, VDDL = 2.5 V +/-5%
CPU & IOAPIC load (lumped) = 20 pF; PCI, SDRAM, 3V66 load (lumped) = 30 pF
Refer to Group Offset Waveform diagram for definition of transition edges.
PARAMETER
SYMBOL
CONDITIONS
CPU to SDRAM
Skew1
Skew Window1
Tsk1 CPU-SDRAM
Tw1 CPU-SDRAM
CPU @ 1.25 V, SDRAM @ 1.5 V
CPU to 3V66
Skew1
Skew Window1
Tsk1 CPU-3V66
Tw1 CPU-3V66
CPU @ 1.25 V, 3V66 @ 1.5 V
SDRAM to 3V66
Skew1 Tsk1 SDRAM-3V66
Skew Window1 Tw1 SDRAM-3V66
SDRAM, 3V66 @ 1.5 V
3V66 to PCI
Skew1
Skew Window1
Tsk1 3V66-PCI
Tw1 3V66-PCI
3V66, PCI @ 1.5 V
IOAPIC to PCI
Skew1
Skew Window1
Tsk1 IOAPIC-PCI
Tw1 IOAPIC-PCI
IOAPIC @ 1.25 V, PCI @ 1.5 V
1Guaranteed by design, not 100% tested in production.
MIN
-3
0
7
0
-500
0
1.5
0
-1
0
TYP MAX UNITS
-2.6
-2
ns
150 500 ps
7.2
8
ns
130 500 ps
100 500 ps
155 500 ps
2.4 3.5 ns
275 500 ps
-0.4
1
ns
0.25
1
ns
Group Skews (CPU = 100 MHz)
TA = 0 - 70º C; VDD = 3.3 V +/-5%, VDDL = 2.5 V +/-5%
CPU & IOAPIC load (lumped) = 20 pF; PCI, SDRAM, 3V66 load (lumped) = 30 pF
Refer to Group Offset Waveform diagram for definition of transition edges.
PARAMETER
SYMBOL
CONDITIONS
CPU to SDRAM
Skew1
Skew Window1
Tsk2 CPU-SDRAM
Tw2 CPU-SDRAM
CPU @ 1.25 V, SDRAM @ 1.5 V
CPU to 3V66
Skew1
Skew Window1
Tsk2 CPU-3V66
Tw2 CPU-3V66
CPU @ 1.25 V, 3V66 @ 1.5 V
SDRAM to 3V66
Skew1 Tsk2 SDRAM-3V66
Skew Window1 Tw2 SDRAM-3V66
SDRAM, 3V66 @ 1.5 V
3V66 to PCI
Skew1
Skew Window1
Tsk2 3V66-PCI
Tw2 3V66-PCI
3V66, PCI @ 1.5 V
IOAPIC to PCI
Skew1
Skew Window1
Tsk2 IOAPIC-PCI
Tw2 IOAPIC-PCI
IOAPIC @ 1.25 V, PCI @ 1.5 V
1Guaranteed by design, not 100% tested in production.
1Guaranteed by design, not 100% tested in production.
MIN
4.5
0
4.5
0
-500
0
1.5
0
-1
0
TYP MAX UNITS
4.9 5.5 ns
140 500 ps
4.8 5.5 ns
150 500 ps
100 500 ps
155 500 ps
2.4 3.5 ns
275 500 ps
-0.4
1
ns
0.25
1
ns
14