ICS950405 Datasheet, PDF (11/16 Pages) Integrated Circuit Systems – AMD - K8 System Clock Chip

ICS950405
Electrical Characteristics - K8 Push Pull Differential Pair
T_A = 0 - 70°C; V_DD = 3.3 V +/-5%; C_L =AMD64 Processor Test Load
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS NOTES
Rising Edge Rate
Falling Edge Rate
Differential Voltage
Change in V_{DIFF_DC}
Magnitude
Common Mode Voltage
δV/δt
δV/δt
V_DIFF
∆V_DIFF
V_CM
Measured at the AMD64 processor's 2
test load. 0 V +/- 400 mV (differential 2
0.4
-150
Measured at the AMD64 processor's
test load. (single-ended measurement) _1.05
10 V/ns
1
10 V/ns
1
2.3 V
1
150 mV
1
1.45 V
1
Change in Common
Mode Voltage
∆V_CM
-200
200 mV
1
Jitter, Cycle to cycle
t_jcyc-cyc
Measurement from differential
wavefrom. Maximum difference of cycle 0
time between 2 adjacent cycles.
200 ps
1
Measured using the JIT2 software
package with a Tek 7404 scope.
Jitter, Accumulated
t_ja
TIE (Time Interval Error) measurement
technique:
-1000
1000
Sample resolution = 50 ps,
Duty Cycle
Sample Duration = 10 µs
d_t3
Measurement from differential
wavefrom
45
53 %
Average value during switching
Output Impedance
R_ON transition. Used for determining series 15
55 Ω
termination value.
Group Skew
t_src-skew
Measurement from differential
wavefrom
250 ps
1_{Guaranteed by design and characterization, not 100% tested in production.}
2 _{All accumulated jitter specifications are guaranteed assuming that REF is at 14.31818MHz}
3 _{Spread Spectrum is off}
1,2,3
1
1
1
0802F—04/22/05
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