ICS1887 Datasheet, PDF (11/14 Pages) Integrated Circuit Systems – FDDI / Fast Ethernet PHYceiverTM

5-Bit Interface – Synchronous Transmit Timing
ICS1887
T#
PARAMETER (conditions)
MIN
t1
TD[4:0] Setup to TCLK rise
10
t2
TD[4:0] Hold after TCLK rise
0
TYP
MAX
UNITS
—
—
ns
—
—
ns
5-Bit Interface – Synchronous Receive Timing
T#
PARAMETER (conditions)
MIN
t1
RD[4:0] Setup to RCLK rise
13.0
t2
RD[4:0] Hold after RCLK rise
12.5
TYP
MAX
UNITS
—
—
ns
—
—
ns
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