ICS1887 Datasheet, PDF (1/14 Pages) Integrated Circuit Systems – FDDI / Fast Ethernet PHYceiverTM

Integrated
Circuit
Systems, Inc.
ICS1887
FDDI / Fast Ethernet PHYceiver^TM
General Description
Features
The ICS1887 is designed to provide high performance clock • Single IC solution to existing designs requiring
recovery and generation for 125 MHz serial data streams. The
multiple devices
ICS1887 is ideally suited for LAN transceiver applications in _{• Data and clock recovery for 125 MBaud FDDI or Fast}
either FDDI or Fast Ethernet environments. The ICS1887
Ethernet applications
converts NRZ to/from NRZI data in addition to providing a _{• Clock multiplication from either a crystal, differential}
5-bit parallel digital data transmit and receive interface.
or single-ended timing source
Clock and data recovery is performed on an input serial data ^{• Continuous clock in the absence of data}
stream or the buffered transmit data depending upon the state • No external PLL components
of the loopback input. A continuous clock source will _{• Lock/Loss status indicator output}
continue to be present even in the absence of input data. _{• Loopback mode for system diagnostics}
All internal timing is derived from either a low cost crystal,
differential or single-ended source.
•
Selectable loop timing mode
• PECL driver with settable sink current
The ICS1887 utilizes advanced CMOS phase-locked loop • Parallel digital transmit and receive data interface
technology which combines high performance and low power _{• NRZ to/from NRZI data conversion}
at a greatly reduced cost.
• Consult ICS for optional configurations and data rates
Block Diagram
Pin Configuration
ICS1887RevF112596
28-Pin SOIC
PHYceiver is a trademark of Integrated Circuit Systems, Inc.