ICS1887 Datasheet, PDF (10/14 Pages) Integrated Circuit Systems – FDDI / Fast Ethernet PHYceiverTM

ICS1887
Clocks — Transmit Clock Tolerance
T#
PARAMETER (conditions)
MIN
t1
TCLK Duty Cycle
40
t2
TCLK Period
—
Note: TCLK Duty cycle = REF_IN Duty cycle ±5%.
Clocks — Receive Clock Tolerance
TYP
MAX
UNITS
50
60
%
40
—
ns
T#
PARAMETER (conditions)
MIN
TYP
MAX
UNITS
t1
RCLK Duty Cycle
t2
RCLK Period
45
50
55
%
—
40
—
ns
10