ICS9FG108 Datasheet, PDF (10/13 Pages) Integrated Circuit Systems – Programmable FTG for Differential P4 CPU, PCI-Express & SATA Clocks

Integrated
Circuit
Systems, Inc.
I²C Table: Vendor & Revision ID Register
Byte 4
Pin #
Name
Bit 7
-
Bit 6
-
Bit 5
-
Bit 4
-
Bit 3
-
Bit 2
-
Bit 1
-
Bit 0
-
RID3
RID2
RID1
RID0
VID3
VID2
VID1
VID0
Control
Function
REVISION ID
VENDOR ID
Type
R
R
R
R
R
R
R
R
I²C Table: DEVICE ID
Byte 5
Pin #
Bit 7
-
Bit 6
-
Bit 5
-
Bit 4
-
Bit 3
-
Bit 2
-
Bit 1
-
Bit 0
-
Name
Control
Function
Device ID = 08 hex
Type
R
R
R
R
R
R
R
R
I²C Table: Byte Count Register
Byte 6
Pin #
Name
Bit 7
-
BC7
Bit 6
-
BC6
Bit 5
-
BC5
Bit 4
-
BC4
Bit 3
-
BC3
Bit 2
-
BC2
Bit 1
-
BC1
Bit 0
-
BC0
Control
Function
Writing to this
register will
configure how
many bytes
will be read
back, default
is 07 = 7
bytes.
Type
RW
RW
RW
RW
RW
RW
RW
RW
ICS9FG108
Advance Information
0
1
PWD
-
-
0
-
-
0
-
-
0
-
-
0
-
-
0
-
-
0
-
-
0
-
-
1
0
1
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
PWD
0
0
0
0
1
0
0
0
0
1
PWD
-
-
0
-
-
0
-
-
0
-
-
0
-
-
0
-
-
1
-
-
1
-
-
1
0823—04/02/04
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