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ICS951403 Datasheet, PDF (1/18 Pages) Integrated Circuit Systems – AMD-K7 System Clock Chip
Integrated
Circuit
Systems, Inc.
ICS951403
AMD-K7TM System Clock Chip
Recommended Application:
ATI chipset with K7 systems
Output Features:
• 3 differential pair open drain CPU clocks (1.5V
external
pull-up; up to 150MHz achieviable through I2C)
• 2 - AGPCLK @ 3.3V
• 8 - PCI @3.3V, including 1 free running
• 1 - 48MHz @ 3.3V
• 1 - 24/48MHz @ 3.3V
• 2- REF @3.3V, 14.318MHz.
Features:
• Programmable ouput frequency
• Programmable ouput rise/fall time
• Programmable group skew
• Real time system reset output
• Spread spectrum for EMI control typically
by 7dB to 8dB,
with programmable spread percentage
• Watchdog timer technology to reset system
if over-clocking causes malfunction
• Uses external 14.318MHz crystal
• Asyncronous CPU and SDRAM clocks
• CPU and PCI outputs are aligned
• CPU - AGP skew <500ps
Pin Configuration
48-Pin SSOP & TSSOP
* Internal 120K pullup resistor on indicated inputs
** Internal 240K pullup resistor on indicated inputs
Block Diagram
PLL2
X1
X2
SEL24_48#
SDATA
SCLK
FS (2:0)
PD#
PCI_STOP#
CPU_STOP#
SPREAD#
XTAL
OSC
PLL1
Spread
Spectrum
Control
Logic
Config.
Reg.
0486B—02/23/04
/2
CPU
DIVDER
Stop
SDRAM
DIVDER
PCI
DIVDER
Stop
AGP
DIVDER
Functionality
48MHz
24_48MHz
REF (1:0)
3 CPUCLKT (2:0)
3 CPUCLKC (2:0)
SDRAM_OUT
PCICLK (6:0)
7
PCICLK_F
AGP (1:0)
2
Bit 7 FS2 FS1 FS0 CPU SDRAM
0 0 0 0 100.00 100.00
0 0 0 1 100.00 133.33
0 0 1 0 100.00 150.00
0 0 1 1 100.00 66.67
0 1 0 0 133.33 133.33
0 1 0 1 125.00 100.00
0 1 1 0 124.00 124.00
0 1 1 1 133.33 100.00
1 0 0 0 112.00 112.00
1 0 0 1 150.00 150.00
1 0 1 0 111.11 166.67
1 0 1 1 110.00 165.00
1 1 0 0 166.67 166.67
1 1 0 1 90.00 90.00
1 1 1 0 48.00 48.00
1 1 1 1 45.00 60.00
AGP SEL = AGP SEL =
PCICLK
0
1
33.33
66.67
50.00
33.33
66.67
50.00
30.00
60.00
50.00
33.33
66.67
50.00
33.33
31.25
31.00
33.33
66.67
62.50
62.00
66.67
50.00
50.00
46.50
50.00
33.60
67.20
56.00
30.00
60.00
50.00
33.33
66.67
55.56
33.00
66.00
55.00
33.33
66.67
55.56
30.00
60.00
45.00
32.00
64.00
48.00
30.00
60.00
45.00
Power Groups
VDD48, GND48 = 48MHz, PLL2
VDDREF, GNDREF= REF, X1, X2
VDD, GND = PLL Core