ICS8432I-101 Datasheet, PDF (1/18 Pages) Integrated Circuit Systems – 700MHZ, DIFFERENTIAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER

Integrated
Circuit
Systems, Inc.
ICS8432I-101
700MHZ,
DIFFERENTIAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
GENERAL DESCRIPTION
FEATURES
The ICS8432I-101 is a general purpose, dual out- • Dual differential 3.3V LVPECL outputs
ICS
HiPerClockS™
put Differential-to-3.3V LVPECL high frequency
synthesizer and a member of the HiPerClockS™
•
Selectable CLK, nCLK or LVCMOS/LVTTL TEST_CLK
family of High Performance Clock Solutions from • TEST_CLK can accept the following input levels:
ICS. The ICS8432I-101 has a selectable LVCMOS or LVTTL
TEST_CLK or CLK, nCLK inputs.The TEST_CLK input accepts
LVCMOS or LVTTL input levels and translates them to 3.3V ^{• CLK, nCLK pair can accept the following differential}
LVPECL levels.The CLK, nCLK pair can accept most standard ^{input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL}
differential input levels.The VCO operates at a frequency range • CLK, nCLK or TEST_CLK maximum input frequency: 40MHz
of 250MHz to 700MHz. The VCO frequency is programmed in
steps equal to the value of the input differential or single ended ^{• Output frequency range: 25MHz to 700MHz}
reference frequency. The VCO and output frequency can be
programmed using the serial or parallel interfaces to the
configuration logic. The low phase noise characteristics of the
ICS8432I-101 makes it an ideal clock source for Gigabit
• VCO range: 250MHz to 700MHz
• Accepts any single-ended input signal on CLK input
with resistor bias on nCLK input
Ethernet and SONET applications.
• Parallel interface for programming counter
and output dividers
• RMS period jitter: 5ps (maximum)
• Cycle-to-cycle jitter: 25ps (maximum)
• 3.3V supply voltage
• -40°C to 85°C ambient operating temperature
• Lead-Free package fully RoHS compliant
BLOCK DIAGRAM
VCO_SEL
CLK_SEL
TEST_CLK
0
CLK
1
nCLK
MR
S_LOAD
S_DATA
S_CLOCK
nP_LOAD
M0:M8
N0:N1
PLL
PHASE DETECTOR
VCO
0
÷1
÷2
÷M
1
÷4
÷8
CONFIGURATION
INTERFACE
LOGIC
PIN ASSIGNMENT
FOUT0
nFOUT0
FOUT1
nFOUT1
32 31 30 29 28 27 26 25
M5 1
M6 2
M7 3
M8 4
N0 5
N1 6
nc 7
VEE 8
ICS8432I-101
24 CLK
23 TEST_CLK
22 CLK_SEL
2 1 VCCA
20 S_LOAD
19 S_DATA
18 S_CLOCK
17 MR
9 10 11 12 13 14 15 16
TEST
32-Lead LQFP
7mm x 7mm x 1.4mm package body
Y Package
Top View
8432DYI-101
www.icst.com/products/hiperclocks.html
1
REV. A MAY 23, 2005