IC42S16400A Datasheet, PDF (8/67 Pages) Integrated Circuit Solution Inc – 1M x 16Bit x 4 Banks (64-MBIT) SDRAM

IC42S16400A
AC ELECTRICAL CHARACTERISTICS
(At TA = 0 ~ 70°C, VDD = VDDQ = 3.3 ± 0.3V, VSS = VSSQ = 0V , unless otherwise noted)
Symbol
tCK3
tCK2
tAC3
tAC2
tCH
tCL
tCKE
tCKH
tAS
tAH
tCMS
tCMH
tDS
tDH
tOH3
tOH2
tLZ
tHZ
tRC
tRAS
tRCD
tRP
tRRD
tDPL
tT
tRSC
tPDE
tSRX
tREF
Parameter
CLK Cycle Time
CLK to valid output delay⁽¹⁾
CLK high pulse width
CLK low pulse width
CKE setup time
CKE hold time
Address setup time
Address hold time
Command setup time
Command hold time
Data input setup time
Data input hold time
Output data hold time⁽¹⁾
CLK to output in low - Z
CLK to output in H - Z
ROW cycle time
ROW active time
RAS to CAS delay
Row precharge time
Row active to active delay
Data in to precharge
Transition time
Mode reg. set cycle
Power down exit setup time
Self refresh exit time
Refresh Time
CAS Latency = 3
CAS Latency = 2
CAS Latency = 3
CAS Latency = 2
CAS Latency = 3
CAS Latency = 2
-6
Min. Max.
6
—
7.5
—
—
5
—
6
2.5
—
2.5
—
1.5
—
0.8
—
1.5
—
0.8
—
1.5
—
0.8
—
1.5
—
0.8
—
2.5
—
2.5
—
0
—
2.5
5
60
—
42 100,000
18
—
15
—
12
—
12
—
1
10
10
—
7.5
—
7.5
—
—
64
Notes:
1. if clock rising time is longer than 1ns, (tr/2-0.5ns) should be added to the parameter.
-7
Min. Max.
Units
7.5
—
ns
10
—
ns
—
5.4
ns
—
6
ns
2.5
—
ns
2.5
—
ns
1.5
—
ns
0.8
—
ns
1.5
—
ns
0.8
—
ns
1.5
—
ns
0.8
—
ns
1.5
—
ns
0.8
—
ns
2.7
—
ns
3
—
ns
0
—
ns
2.7 5.4
ns
67.5 —
ns
45 100,000
ns
20
—
ns
20
—
ns
15
—
ns
15
—
ns
1
10
ns
10
—
ns
7.5
—
ns
7.5
—
ns
—
64
ms
8
Integrated Circuit Solution Inc.
DR039-0A 02/19/2004