IC42S16400A Datasheet, PDF (36/67 Pages) Integrated Circuit Solution Inc – 1M x 16Bit x 4 Banks (64-MBIT) SDRAM

IC42S16400A
Clock Suspension During Burst Write (Using CKE) (1 of 2)
CLK
CKE
CS
Burst Length=4, CAS Latency=2
T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22
tCK2
RAS
CAS
WE
*BS0
A10
RAa
ADD
RAa
CAa
DQM
Hi-Z
DQ
DAa0
DAa1
DAa2
DAa3
Activate
Command
Bank A
Clock
Suspended
1 Cycle
Write
Command
Bank A
Clock
Suspended
2 Cycles
Clock
Suspended
3 Cycles
BS1=”L”, Bank C,D = Idle
36
Integrated Circuit Solution Inc.
DR039-0A 02/19/2004