IC41SV4105 Datasheet, PDF (8/17 Pages) Integrated Circuit Solution Inc – 1Mx4 bit Dynamic RAM with Fast Page Mode

IC41SV4105
AC CHARACTERISTICS (Continued)^{(1,2,3,4,5,6)}
(Recommended Operating Conditions unless otherwise noted.)
Symbol
tACH
tOEH
tDS
tDH
tRWC
tRWD
tCWD
tAWD
tPC
tRASP
tCPA
tPRWC
tOFF
tCSR
tCHR
tORD
tREF
tT
Parameter
Column-Address Setup Time to CAS
Precharge during WRITE Cycle
OE Hold Time from WE during
READ-MODIFY-WRITE cycle⁽¹⁸⁾
Data-In Setup Time^{(15, 22)}
Data-In Hold Time^{(15, 22)}
READ-MODIFY-WRITE Cycle Time
RAS to WE Delay Time during
READ-MODIFY-WRITE Cycle⁽¹⁴⁾
CAS to WE Delay Time^{(14, 20)}
Column-Address to WE Delay Time⁽¹⁴⁾
Fast Page Mode READ or WRITE
Cycle Time
Fast Page Mode RAS Pulse Width
Access Time from CAS Precharge⁽¹⁵⁾
Fast Page Mode READ WRITE
Cycle Time
Output Buffer Turn-Off Delay from
CAS or RAS^{(13,15,19, 24)}
CAS Setup Time (CBR REFRESH)^{(20, 25)}
CAS Hold Time (CBR REFRESH)^{( 21, 25)}
OE Setup Time prior to RAS during
HIDDEN REFRESH Cycle
Auto Refresh Period 1,024 Cycles
Transition Time (Rise or Fall)^{(2, 3)}
-50
Min. Max.
15
−
-70
Min. Max.
15 −
-100
Min. Max.
15
−
Units
ns
10
−
20 − 25
−
ns
0
−
0
−
0
−
ns
8
−
15 − 20
−
ns
125 − 185 − 240 −
ns
70
− 100 − 130 −
ns
34
−
45 − 55
−
ns
42
−
60 − 85
−
ns
20
−
45 − 60
−
ns
50 100K 70 100K 100 100K ns
-
27
-
40
-
55
ns
47
− 100 − 120 −
ns
3
15
3 15 3
15
ns
5
−
5
−
5
−
ns
10
−
10 − 10
−
ns
0
−
0
−
0
−
ns
−
16
− 16 −
16 ms
3
50
3 50 3
50
ns
AC TEST CONDITIONS
Output load:
One TTL Load and 100 pF
Input timing reference levels: VIH = 1.4V, VIL = 0.6V
Output timing reference levels: VOH = 1.4V, VOL = 0.6V
8
Integrated Circuit Solution Inc.
DR032-0A 10/29/2001