IC41SV4105 Datasheet, PDF (16/17 Pages) Integrated Circuit Solution Inc – 1Mx4 bit Dynamic RAM with Fast Page Mode

IC41SV4105
CBR REFRESH CYCLE (Addresses; WE, OE = DON'T CARE)
RAS
tRPC
tCP
CAS
I/O
tRP
tRAS
tCHR
tCSR
tRPC
tRP
tRAS
tCSR
tCHR
Open
Don’t Care
HIDDEN REFRESH CYCLE⁽¹⁾ (WE = HIGH; OE = LOW)
RAS
tCRP
CAS
tASR
ADDRESS
Row
I/O
OE
tRAS
tRP
tRCD
tRSH
tAR
tRAD
tRAH tASC
tRAL
tCAH
Open
Column
tAA
tRAC
tCLZ
tCAC
tOE
tORD
tRAS
tCHR
tOFF⁽²⁾
Valid Data
Open
tOD
Don’t Care
Notes:
1. A Hidden Refresh may also be performed after a Write Cycle. In this case, WE = LOW and OE = HIGH.
2. tOFF is referenced from rising edge of RAS or CAS, whichever occurs last.
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Integrated Circuit Solution Inc.
DR032-0A 10/29/2001