IC41SV4105 Datasheet, PDF (2/17 Pages) Integrated Circuit Solution Inc – 1Mx4 bit Dynamic RAM with Fast Page Mode

IC41SV4105
1M x 4 (4−MBIT) DYNAMIC RAM
WITH FAST PAGE MODE
Preliminary
FEATURES
• Fast Page Mode Access Cycle
• TTL compatible inputs and outputs
• Refresh Interval:
-- 1,024 cycles/16 ms
• Refresh Mode: RAS-Only,
CAS-before-RAS (CBR), and Hidden
• JEDEC standard pinout
• Single power supply:
1.9V − 2.4V
DESCRIPTION
The ICSI 4105 Series is a 1,048,576 x 4-bit high-performance
CMOS Dynamic Random Access Memory. The Fast Page
Mode allows 1,024 random accesses within a single row with
access cycle time as short as 20 ns per 4-bit word.
These features make the 4105 Series ideally suited for digital
signal processing, and low power portable audio applications.
The 4105 Series is packaged in a 20-pin 300mil SOJ and a 20
pin TSOP-2
PIN CONFIGURATION
20 (26) Pin SOJ, TSOP-2
I/O0 1
I/O1 2
WE 3
RAS 4
A9 5
26 GND
25 I/O3
24 I/O2
23 CAS
22 OE
A0 9
A1 10
A2 11
A3 12
VCC 13
18 A8
17 A7
16 A6
15 A5
14 A4
KEY TIMING PARAMETERS
Parameter
RAS Access Time (tRAC)
CAS Access Time (tCAC)
-50 -70 -100 Unit
50 70 100 ns
14 20 25 ns
Column Address Access Time (tAA) 25 35 50 ns
Fast Page Mode Cycle Time (tPC) 20 45 60 ns
Read/Write Cycle Time (tRC)
90 130 180 ns
PIN DESCRIPTIONS
A0-A9
I/O0-3
WE
OE
RAS
CAS
Vcc
GND
Address Inputs
Data Inputs/Outputs
Write Enable
Output Enable
Row Address Strobe
Column Address Strobe
Power
Ground
ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors
which may appear in this publication. © Copyright 2000, Integrated Circuit Solution Inc.
2
Integrated Circuit Solution Inc.
DR032-0A 10/29/2001