IC62LV1008L Datasheet, PDF (6/11 Pages) Integrated Circuit Solution Inc – 1 M x 8 bit Low Voltage and Ultra Low Power CMOS Static RAM

IC62LV1008L
IC62LV1008LL
READ CYCLE SWITCHING CHARACTERISTICS⁽¹⁾ (Over Operating Range)
Symbol Parameter
-55
-70
-100
Min. Max.
Min. Max.
Min. Max.
Unit
tRC Read Cycle Time
55 —
70 —
100 —
ns
tAA Address Access Time
— 55
— 70
— 100
ns
tOHA Output Hold Time
10 —
10 —
15 —
ns
tACE1 CE1 Access Time
— 55
— 70
— 100
ns
tACE2
tDOE
tLZOE⁽²⁾
tHZOE⁽²⁾
CE2 Access Time
OE Access Time
OE to Low-Z Output
OE to High-Z Output
— 55
— 30
5—
— 20
— 70
— 35
5—
0 25
— 100
ns
— 50
ns
5—
ns
0 30
ns
tLZCE1⁽²⁾ CE1 to Low-Z Output
10 —
10 —
10 —
ns
tLZCE2⁽²⁾ CE2 to Low-Z Output
10 —
10 —
10 —
ns
tHZCE⁽²⁾ CE1 or CE2 to Low-Z Output
0 20
0 25
0 30
ns
Notes:
1. Test conditions assume signal transition times of 5 ns or less, input pulse levels of 0.4V to 2.2V and output
loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall Times
Input Reference Level
Output Reference Level
Output Load
Unit
0.4V to 2.2V
5 ns
1.3V
1.5V
See Figures 1 and 2
AC TEST LOADS
OUTPUT
1 TTL
100 pF
Including
jig and
scope
Figure 1
6
OUTPUT
1 TTL
5 pF
Including
jig and
scope
Figure 2
Integrated Circuit Solution Inc.
LPSR015-0A 1/3/2001