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IC-MQF_15 Datasheet, PDF (33/38 Pages) IC-Haus GmbH – Sin/Cos INTERPOLATION IC WITH RS422 DRIVER
iC-MQF PROGRAMMABLE 12-BIT preliminary
Sin/Cos INTERPOLATION IC WITH RS422 DRIVER
TEST MODE
Rev C1, Page 33/38
iC-MQF switches to test mode if a voltage larger
than VTMon is applied to pin ERR (precondition:
EMODE(0) = 1). In response iC-MQF transmits its
configuration settings as current-modulated data us-
ing I/O pin ERR either directly from the RAM (for
EMODE(2) = 1) or after re-reading the EEPROM (for
EMODE(2) = 0). If the voltage at pin ERR falls below
VTMoff, test mode is terminated and data transmission
aborted.
The clock rate for the data output is determined by
ENFAST. Two clock rates can be selected: 780 ns for
ENFAST = 1 or 3.125 µs for ENFAST = 0 (see Electri-
cal Characteristics, B12, for clock frequency and toler-
ances).
Data is output in Manchester code via two clock pulses
per bit. To this end the lowside current source switches
between a Z state (OFF = 0 mA) and an L state (ON =
2 mA).
The bit information lies in the direction of the current
source switch:
Zero bit: change of state Z → L (OFF to ON)
One bit: Change of state L → Z (ON to OFF)
Transmission consists of a start bit (a one bit), 8 data
bits and a pause interval in Z state (the timing is identi-
cal with an EEPROM access via the I2C interface).
Example: byte value = 1000 1010
Transmission including the start bit: 1 1000 1010
In Manchester code: LZ LZZL ZLZL LZZL LZZL
Decoding of the data stream:
ZZZZZZ LZ LZ ZL ZL ZL LZ ZL LZ ZL ZZZZZZ
Pause 1 1 0 0 0 1 0 1 0 Pause
EMODE
Code 2:0
000
010
001
011
101
111
100
110
Addr 0x1C, bit 6:4
Function during test
mode
Normal operation
Normal operation
Transmission of error
and EEPROM OEM data
(address range 0x24 to
0x7F)
Transmission of
EEPROM contents
(0x0-0x7F)
Transmission of error
and RAM OEM data
(ENSL = 1, address
range 0x3B to 0x43)
Transmission of RAM
contents (0x0-0x7F)
(ENSL = 1)
Not allowed
Not allowed
Function following test
mode
Normal operation
Repeated read out of
EEPROM
Repeated read out of
EEPROM
Repeated read out of
EEPROM
Repeated read out of
EEPROM
Repeated read out of
EEPROM
Table 59: Test Mode
VP
VP
C21
100nF
7
VP
U22-S
AD8029
VN
4
C22
100nF
8
VP
U23-S
LM393
GND
4
U23-B
VP LM393
6-
7
5+
JP4
ERR
DATA_ON
M22
IRLML6401
R26
100k
R28
51k
M21
2N7002
VP
R23
2K
D21
LL4148
R27
100k
R21
475k
R22
365k
8
U21
5
LM285
4
VDD
C23
100nF
R24
470
C24
100pF
U22-A
2-
+ 3
AD8029
NDIS
8
VP
U23-A
LM393
6
2-
3+
C25
100nF
max. 5V
VDD
C26
100nF
R25
2k
1
DATA_OUT
dra_mq1d_error_s c hem
Figure 11: Example circuit for the decoding and con-
version of the current-modulated signals
to logic levels.