IC-JX Datasheet, PDF (30/36 Pages) IC-Haus GmbH – 16-FOLD 24 V HIGH-SIDE DRIVER WITH μC INTERFACE

iC-JX
16-FOLD 24 V HIGH-SIDE DRIVER WITH µC INTERFACE
Rev C1, Page 30/36
If data from several consecutive registers is to be read
out (see Figure 12), the autoincrement function en-
ables an abbreviated transmission protocol to be run
using iC-JX. Here the master does not send a 0 code
after the address of the first register value and the NOP
byte but the number of registers to be read out mi-
nus one (an entry of 1..15 results in a readout of 2..16
bytes). Here, too, the inverted value is transmitted in
the second nibble of the byte. The addressed iC-JX
then transmits the consecutive register values and af-
ter one byte checks the data returned from the mas-
ter for errors. Once the required number of register
values has been sent the slave transmits the address
of the last register addressed, followed by the control
byte 0b01011001 with error-free transmission or the in-
verted value 0b10100110 with an error in transmission.
During transmission of the control byte the synchro-
nism of the signals at SI and SOx is again checked; if
these are not synchronous, on recognition of this fact
the slave then transmits the inverted control byte.
Figure 12: Reading several values of consecutive register addresses (autoincrement)
Writing to an iC-JX (Figure 13, Figure 14):
In the write process one or several registers can be
written to during a transmit cycle. To this end the
master first sends the start address and the numeri-
cal amount of data to be transmitted minus one. As in
the read process this value is transmitted as two nib-
bles (non-inverted and inverted) to increase security.
Data from consecutive addresses is then sent. iC-JX
returns the master data with a delay of one byte, al-
lowing the master to constantly monitor whether an er-
ror has occurred during the addressing sequence or
data transmission. If an error is detected, the master
can prevent the faulty data being accepted by the slave
registers by ending communication.
Figure 13: Writing one register value
Figure 14: Writing several register values