IC-TW3 Datasheet, PDF (13/24 Pages) IC-Haus GmbH – SENSOR SIGNAL CONDITIONER WITH TEMPERATURE COMPENSATION AND LINE DRIVER

iC-TW3 SENSOR SIGNAL CONDITIONER WITH
TEMPERATURE COMPENSATION AND LINE DRIVER
Rev B1, Page 13/24
Addressing
The EEPROM address 0x00 maps to the 1-wire ad-
dress 128. Accessing EEPROM address 0 is therefore
equivalent to accessing memory location 128 through
the 1-wire interface. All other 1-wire addresses are
thus determined by adding 128 to the EEPROM ad-
dress of interest.
Write Sequence
Figure 2 describes the write sequence of the 1-wire in-
terface. On an idle wire, a write sequence is initiated
by generating a start condition followed by the write
command (000) and by the address and register data.
Read Sequence
A read sequence is depicted in Figure 3. After the start
condition the read command (001) is followed by the
register address. The master then releases the wire
and iC-TW3 begins to pull low while internally access-
ing the data. When the data is ready it is produced
while following the same PWM rules valid for the mas-
ter.
1-Wire Write Access
Idle, wire is high
3-bit command word
000 = write
001 = read
Filler bit, value 0
Wire not driven
Wire driven by master
idle
start
000
address(7:0)
0
data(7:0)
idle
To initiate communication
pull low for at least t
start
8-bit register address:
0 to 127: internal registers
128 to 255: external EEPROM
Wait at least for t
idle
before new access
Figure 2: Register write sequence
1-Wire Read Access
3 bit command word
000 = write
Idle, wire is high
001 = read
Wire not driven
Master releases driver
Wire driven by master
iC-TW3 starts returning data
(first bit is dummy)
Wire driven by iC-TW3
idle
start
001
address(7:0)
delay
X
data(7:0)
idle
To initiate communication
pull low for at least t
start
8-bit register address:
0 to 127: internal registers
128 to 255: external EEPROM
iC-TW3 drives low until
data is ready
Wait at least for t
idle
before new access
Figure 3: Register read sequence