HY62SF16201A Datasheet, PDF (8/10 Pages) Hynix Semiconductor – 128Kx16bit full CMOS SRAM

HY62SF16201A
DATA RETENTION ELECTRIC CHARACTERISTIC
TA = 0°C to 70°C /-40°C to 85°C (I)
Symbol
Parameter
Test Condition
VDR
Vcc for Data Retention /CS > Vcc - 0.2V or
/UB = /LB > Vcc-0.2V,
VIN > Vcc - 0.2V or VIN < Vss + 0.2V
ICCDR Data Retention Current Vcc=1.5V, /CS > Vcc - 0.2V or LL
/UB = /LB > Vcc-0.2V,
VIN > Vcc - 0.2V or
SL
VIN < Vss + 0.2V
tCDR Chip Deselect to Data
See Data Retention Timing Diagram
Retention Time
tR
Operating Recovery Time
Notes:
1. Typical values are under the condition of TA = 25°C.
2. Typical Values are sampled and not 100% tested
3. tRC is read cycle time.
Min. Typ. Max. Unit
1.2
-
2.3
V
-
-
-
-
0
-
tRC(3)
-
3
uA
1
uA
-
ns
-
ns
DATA RETENTION TIMING DIAGRAM
VCC
1.7V
DATA RETENTION MODE
tCDR
tR
VDR
CS
or /UB &/LB
VSS
CS > VCC-0.2V
or /UB = /LB > Vcc – 0.2V
Rev.06 /Mar. 2002
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