HY5V22GF Datasheet, PDF (8/11 Pages) Hynix Semiconductor – 4 Banks x 1M x 32Bit Synchronous DRAM

AC CHARACTERISTICS II (AC operating conditions unless otherwise noted)
Parameter
RAS cycle time
Operation
Auto Refresh
RAS to CAS delay
RAS active time
RAS precharge time
RAS to RAS bank active delay
CAS to CAS delay
Write command to data-in delay
Data-in to precharge command
Data-in to active command
DQM to data-out Hi-Z
DQM to data-in mask
MRS to new command
Precharge to data
output Hi-Z
CAS Latency = 3
CAS Latency = 2
Power down exit time
Self refresh exit time
Refresh Time
Symbol
tRC
tRRC
tRCD
tRAS
tRP
tRRD
tCCD
tWTL
tDPL
tDAL
tDQZ
tDQM
tMRD
tPROZ3
tPROZ2
tPDE
tSRE
tREF
-H
Min
Max
65
-
65
-
20
-
45
120K
20
-
15
-
1
-
0
-
1
-
4
-
2
-
0
-
1
-
3
-
2
-
1
-
1
-
-
64
-P
Min
Max
70
-
70
-
20
-
50
120K
20
-
20
-
1
-
0
-
1
-
3
-
2
-
0
-
1
-
3
-
2
-
1
-
1
-
-
64
Note :
1. A new command can be given tRRC after self refresh exit
HY5V22GF
Unit Note
ns
ns
ns
ns
ns
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
1
ms
Rev. 0.3/Nov. 01
9