HY5V22GF Datasheet, PDF (6/11 Pages) Hynix Semiconductor – 4 Banks x 1M x 32Bit Synchronous DRAM

DC CHARACTERISTICS II (DC operating conditions unless otherwise noted)
Parameter
Symbol
Test Condition
Operating Current
Precharge Standby Current
in power down mode
Precharge Standby Current
in non power down mode
Active Standby Current
in power down mode
Active Standby Current
in non power down mode
Burst Mode Operating
Current
Auto Refresh Current
Self Refresh Current
IDD1
IDD2P
IDD2PS
IDD2N
IDD2NS
IDD3P
IDD3PS
IDD3N
IDD3NS
IDD4
IDD5
IDD6
Burst Length=1, One bank active
tRAS ≥ tRAS(min), tRP ≥ tRP(min),
IOL=0mA
CKE ≤ VIL(max), tCK = 15ns
CKE ≤ VIL(max), tCK = ∞
CKE ≥ VIH(min), CS ≥ VIH(min), tCK = 15ns
Input signals are changed one time during
2clks. All other pins ≥ VDD-0.2V or ≤ 0.2V
CKE ≥ VIH(min), tCK = ∞
Input signals are stable.
CKE ≤ VIL(max), tCK = 15ns
CKE ≤ VIL(max), tCK = ∞
CKE ≥ VIH(min), CS ≥ VIH(min), tCK = 15ns
Input signals are changed one time during
2clks. All other pins ≥ VDD-0.2V or ≤ 0.2V
CKE ≥ VIH(min), tCK = ∞
Input signals are stable
tCK ≥ tCK(min),
tRAS ≥ tRAS(min), IOL=0mA
All banks active
CL=3
CL=2
tRRC ≥ tRRC(min), 2 banks active
CKE ≤ 0.2V
Speed
-H
-P
150
140
4
4
30
20
6
6
80
50
250
230
350
330
4
Note :
1.IDD1 and IDD4 depend on output loading and cycle rates. Specified values are measured with the output open
2.Min. of tRRC (Refresh RAS cycle time) is shown at AC CHARACTERISTICS I
HY5V22GF
Unit
Note
mA
1
mA
mA
mA
mA
mA
1
mA
2
mA
Rev. 0.3/Nov. 01
7