HYMD525G726AS4-M Datasheet, PDF (7/17 Pages) Hynix Semiconductor – Registered DDR SDRAM DIMM

CAPACITANCE (TA=25^oC, f=100MHz )
HYMD525G726A(L)S4M-M/K/H/L
Parameter
Pin
Input Capacitance
Input Capacitance
Input Capacitance
Input Capacitance
Input Capacitance
Data Input / Output Capacitance
Data Input / Output Capacitance
A0 ~ A12, BA0, BA1
/RAS, /CAS, /WE
CKE0
CS0
CK0, /CK0
DQ0 ~ DQ63, DQS0 ~ DQS17
CB0 ~ CB7
Symbol Min
CIN1
5
CIN2
5
CIN3
5
CIN4
6
CIN5
12
CIO1
14
CIO2
14
Max
7
7
7
7
14
16
16
Unit
pF
pF
pF
pF
pF
pF
pF
Note :
1. VDD = min. to max., VDDQ = 2.3V to 2.7V, VODC = VDDQ/2, VOpeak-to-peak = 0.2V
2. Pins not under test are tied to GND.
3. These values are guaranteed by design and are tested on a sample basis only.
OUTPUT LOAD CIRCUIT
Output
VTT
RT=50Ω
Zo=50Ω
CL=30pF
VREF
Rev. 0.3 / Apr. 2004
7