HYMD512M646BFS8-J Datasheet, PDF (7/19 Pages) Hynix Semiconductor – Unbuffered DDR SO-DIMM

CAPACITANCE (TA=25^oC, f=100MHz )
HYMD512M646B(L)FS8-J/M/K/H/L
Parameter
Pin
Input Capacitance
Input Capacitance
Input Capacitance
Input Capacitance
Input Capacitance
Input Capacitance
Data Input / Output Capacitance
A0 ~ A13, BA0, BA1
/RAS, /CAS, /WE
CKE0, CKE1
/CS0, /CS1
CK0, /CK0, CK1, /CK1
DM0 ~ DM7
DQ0 ~ DQ63, DQS0 ~ DQS7
Symbol Min
CIN1
50
CIN2
50
CIN3
36
CIN4
36
CIN5
30
CIN6
10
CIO1
10
Max
68
68
48
48
38
18
18
Unit
pF
pF
pF
pF
pF
pF
pF
Note :
1. VDD = min. to max., VDDQ = 2.3V to 2.7V, VODC = VDDQ/2, VOpeak-to-peak = 0.2V
2. Pins not under test are tied to GND.
3. These values are guaranteed by design and are tested on a sample basis only.
OUTPUT LOAD CIRCUIT
Output
VTT
RT=50Ω
Zo=50Ω
CL=30pF
VREF
Rev. 0.1 / Jan. 2004
7