HY62CT08081E Datasheet, PDF (7/12 Pages) Hynix Semiconductor – 32Kx8bit CMOS SRAM

TIMING DIAGRAM
READ CYCLE 1
ADDR
OE
CS
Data
Out
High-Z
tRC
tAA
tOE
tOLZ
tACS
tCLZ
HY62CT08081E Series
tOH
tOHZ
tCHZ
Data Valid
Note(READ CYCLE):
1. tCHZ and tOHZ are defined as the time at which the outputs achieve the open circuit conditions and arenot
referenced to output voltage levels.
2. At any given temperature and voltage condition, tCHZ max. is less than tCLZ min. both for a given device
and from device to device.
3. /WE is high for the read cycle.
READ CYCLE 2
ADDR
Data
Out
tRC
tAA
tOH
Previous Data
tOH
Data Valid
Note(READ CYCLE):
1. /WE is high for the read cycle.
2. Device is continuously selected /CS= VIL.
3. /OE =VIL.
Rev 04 / Apr. 2001
6