HY5W6B6DLF-HE Datasheet, PDF (6/27 Pages) Hynix Semiconductor – 4Banks x1M x 16bits Synchronous DRAM

Preliminary
HY5W6B6DLF(P)-xE
4Banks x 1M x 16bits Synchronous DRAM
BASIC FUNCTIONAL DESCRIPTION
Mode Register
BA1 BA0 A11 A10
0
0
0
0
A9
OP Code
A8 A7 A6 A5 A4 A3 A2 A1 A0
0
0
CAS Latency
BT
Burst Length
OP Code
A9
0
1
Write Mode
Burst Read and Burst Write
Burst Read and Single Write
Burst Type
A3
Burst Type
0
Sequential
1
Interleave
CAS Latency
A6 A5 A4
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
CAS Latency
Reserved
1
2
3
Reserved
Reserved
Reserved
Reserved
Burst Length
A2 A1 A0
00 0
00 1
01 0
01 1
10 0
10 1
1 10
1 11
Burst Length
A3 = 0
A3=1
1
1
2
2
4
4
8
8
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Full page
Reserved
Rev. 0.1 / Feb. 2004
6