HY5PS56421LF-E3 Datasheet, PDF (6/35 Pages) Hynix Semiconductor – 256Mb DDR2 SDRAM

32Mx8 DDR2 PIN CONFIGURATION
HY5PS56421(L)F
HY5PS56821(L)F
HY5PS561621(L)F
1
2
3
VDD NU, RDQS VSS
A
DQ6
VSSQ DM, RDQS
B
VDDQ
DQ1
VDDQ
C
DQ4
VSSQ
DQ3
D
VDDL
VREF
VSS
E
CKE
WE
F
NC
BA0
BA1
G
A10
A1
H
VSS
A3
A5
J
A7
A9
K
VDD
A12
NC
L
7
VSSQ
DQS
VDDQ
DQ2
VSSDL
RAS
CAS
A2
A6
A11
NC
8
DQS
VSSQ
DQ0
VSSQ
CK
CK
CS
A0
A4
A8
A13
9
VDDQ
DQ7
VDDQ
DQ5
VDD
ODT
VDD
VSS
ROW AND COLUMN ADDRESS TABLE
ITEMS
# of Bank
Bank Address
Auto Precharge Flag
Row Address
Column Address
Page size
32Mx8
4
BA0, BA1
A10/AP
A0 - A12
A0-A9
1 KB
Rev 1.0/July. 2004
6